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Searched refs:amdgpu_device_wb_get (Results 1 – 16 of 16) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_ring.c196 r = amdgpu_device_wb_get(adev, &ring->rptr_offs); in amdgpu_ring_init()
202 r = amdgpu_device_wb_get(adev, &ring->wptr_offs); in amdgpu_ring_init()
208 r = amdgpu_device_wb_get(adev, &ring->fence_offs); in amdgpu_ring_init()
214 r = amdgpu_device_wb_get(adev, &ring->trail_fence_offs); in amdgpu_ring_init()
224 r = amdgpu_device_wb_get(adev, &ring->cond_exe_offs); in amdgpu_ring_init()
Damdgpu_ih.c77 r = amdgpu_device_wb_get(adev, &wptr_offs); in amdgpu_ih_ring_init()
81 r = amdgpu_device_wb_get(adev, &rptr_offs); in amdgpu_ih_ring_init()
Dsi_dma.c210 r = amdgpu_device_wb_get(adev, &index); in si_dma_ring_test_ring()
261 r = amdgpu_device_wb_get(adev, &index); in si_dma_ring_test_ib()
Dmes_v10_1.c569 r = amdgpu_device_wb_get(adev, &adev->mes.sch_ctx_offs); in mes_v10_1_allocate_mem_slots()
580 r = amdgpu_device_wb_get(adev, &adev->mes.query_status_fence_offs); in mes_v10_1_allocate_mem_slots()
Dsdma_v2_4.c554 r = amdgpu_device_wb_get(adev, &index); in sdma_v2_4_ring_test_ring()
607 r = amdgpu_device_wb_get(adev, &index); in sdma_v2_4_ring_test_ib()
Dcik_sdma.c620 r = amdgpu_device_wb_get(adev, &index); in cik_sdma_ring_test_ring()
672 r = amdgpu_device_wb_get(adev, &index); in cik_sdma_ring_test_ib()
Dsdma_v3_0.c826 r = amdgpu_device_wb_get(adev, &index); in sdma_v3_0_ring_test_ring()
879 r = amdgpu_device_wb_get(adev, &index); in sdma_v3_0_ring_test_ib()
Dsdma_v5_2.c856 r = amdgpu_device_wb_get(adev, &index); in sdma_v5_2_ring_test_ring()
917 r = amdgpu_device_wb_get(adev, &index); in sdma_v5_2_ring_test_ib()
Damdgpu_gfx.c720 if (amdgpu_device_wb_get(adev, &reg_val_offs)) { in amdgpu_kiq_rreg()
Dsdma_v5_0.c919 r = amdgpu_device_wb_get(adev, &index); in sdma_v5_0_ring_test_ring()
980 r = amdgpu_device_wb_get(adev, &index); in sdma_v5_0_ring_test_ib()
Damdgpu.h554 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb);
Dsdma_v4_0.c1537 r = amdgpu_device_wb_get(adev, &index); in sdma_v4_0_ring_test_ring()
1590 r = amdgpu_device_wb_get(adev, &index); in sdma_v4_0_ring_test_ib()
Dgfx_v9_0.c1087 r = amdgpu_device_wb_get(adev, &index); in gfx_v9_0_ring_test_ib()
4091 if (amdgpu_device_wb_get(adev, &reg_val_offs)) { in gfx_v9_0_kiq_read_clock()
Damdgpu_device.c1047 int amdgpu_device_wb_get(struct amdgpu_device *adev, u32 *wb) in amdgpu_device_wb_get() function
Dgfx_v8_0.c884 r = amdgpu_device_wb_get(adev, &index); in gfx_v8_0_ring_test_ib()
Dgfx_v10_0.c3505 r = amdgpu_device_wb_get(adev, &index); in gfx_v10_0_ring_test_ib()