Searched refs:apic_base (Results 1 – 18 of 18) sorted by relevance
40 sregs.apic_base = 1 << 10; in main()43 sregs.apic_base); in main()44 sregs.apic_base = 1 << 11; in main()47 sregs.apic_base); in main()
157 run->s.regs.sregs.apic_base = 1 << 11; in main()170 TEST_ASSERT(run->s.regs.sregs.apic_base == 1 << 11, in main()172 run->s.regs.sregs.apic_base); in main()
189 return apic->vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE; in kvm_apic_hw_enabled()214 return apic->vcpu->arch.apic_base & X2APIC_ENABLE; in apic_x2apic_mode()256 static inline enum lapic_mode kvm_apic_mode(u64 apic_base) in kvm_apic_mode() argument258 return apic_base & (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE); in kvm_apic_mode()
2189 if (!(vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE)) in kvm_free_lapic()2247 u64 old_value = vcpu->arch.apic_base; in kvm_lapic_set_base()2253 vcpu->arch.apic_base = value; in kvm_lapic_set_base()2278 apic->base_address = apic->vcpu->arch.apic_base & in kvm_lapic_set_base()2349 vcpu->arch.apic_base | MSR_IA32_APICBASE_BSP); in kvm_lapic_reset()2463 vcpu->arch.apic_base = MSR_IA32_APICBASE_ENABLE; in kvm_create_lapic()2592 kvm_lapic_set_base(vcpu, vcpu->arch.apic_base); in kvm_apic_set_state()
119 vcpu->arch.apic_base & MSR_IA32_APICBASE_ENABLE); in kvm_update_cpuid_runtime()
400 return vcpu->arch.apic_base; in kvm_get_apic_base()8294 kvm_run->apic_base = kvm_get_apic_base(vcpu); in post_kvm_run_save()9598 sregs->apic_base = kvm_get_apic_base(vcpu); in __get_sregs()9730 apic_base_msr.data = sregs->apic_base; in __set_sregs()10406 return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0; in kvm_vcpu_is_bsp()
156 __u64 apic_base; member
144 __u64 apic_base; member
191 __u64 apic_base; member
279 __u64 apic_base; member
213 __u64 apic_base; member
203 sregs->cr8, sregs->efer, sregs->apic_base); in sregs_dump()
543 u64 apic_base; member
1279 svm->vcpu.arch.apic_base = APIC_DEFAULT_PHYS_BASE | in svm_vcpu_reset()1282 svm->vcpu.arch.apic_base |= MSR_IA32_APICBASE_BSP; in svm_vcpu_reset()
849 if (CC(vcpu->arch.apic_base & X2APIC_ENABLE && e->index >> 8 == 0x8)) in nested_vmx_msr_check_common()
464 __u64 apic_base;4894 __u64 apic_base;