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Searched refs:cfg1 (Results 1 – 25 of 41) sorted by relevance

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/kernel/linux/linux-5.10/drivers/staging/comedi/drivers/
Dni_at_ao.c108 unsigned short cfg1; member
120 devpriv->cfg1 |= ATAO_CFG1_GRP2WR; in atao_select_reg_group()
122 devpriv->cfg1 &= ~ATAO_CFG1_GRP2WR; in atao_select_reg_group()
123 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_select_reg_group()
271 devpriv->cfg1 = 0; in atao_reset()
272 outw(devpriv->cfg1, dev->iobase + ATAO_CFG1_REG); in atao_reset()
/kernel/linux/linux-5.10/drivers/gpu/drm/exynos/
Dexynos_drm_fimc.c421 u32 cfg1, cfg2; in fimc_src_set_transf() local
425 cfg1 = fimc_read(ctx, EXYNOS_MSCTRL); in fimc_src_set_transf()
426 cfg1 &= ~(EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
435 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
437 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
442 cfg1 |= EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
444 cfg1 |= EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
447 cfg1 |= (EXYNOS_MSCTRL_FLIP_X_MIRROR | in fimc_src_set_transf()
450 cfg1 &= ~EXYNOS_MSCTRL_FLIP_X_MIRROR; in fimc_src_set_transf()
452 cfg1 &= ~EXYNOS_MSCTRL_FLIP_Y_MIRROR; in fimc_src_set_transf()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/nouveau/dispnv04/
Darb.c202 uint32_t cfg1 = nvif_rd32(device, NV04_PFB_CFG1); in nv04_update_arb() local
224 sim_data.mem_latency = cfg1 & 0xf; in nv04_update_arb()
225 sim_data.mem_page_miss = ((cfg1 >> 4) & 0xf) + ((cfg1 >> 31) & 0x1); in nv04_update_arb()
/kernel/linux/linux-5.10/drivers/media/platform/atmel/
Datmel-isi.c361 u32 ctrl, cfg1; in start_dma() local
363 cfg1 = isi_readl(isi, ISI_CFG1); in start_dma()
388 cfg1 &= ~ISI_CFG1_FRATE_DIV_MASK; in start_dma()
390 cfg1 |= isi->pdata.frate | ISI_CFG1_DISCR; in start_dma()
399 isi_writel(isi, ISI_CFG1, cfg1); in start_dma()
788 u32 cfg1 = 0; in isi_camera_set_bus_param() local
792 cfg1 |= ISI_CFG1_HSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
794 cfg1 |= ISI_CFG1_VSYNC_POL_ACTIVE_LOW; in isi_camera_set_bus_param()
796 cfg1 |= ISI_CFG1_PIXCLK_POL_ACTIVE_FALLING; in isi_camera_set_bus_param()
798 cfg1 |= ISI_CFG1_EMB_SYNC; in isi_camera_set_bus_param()
[all …]
/kernel/linux/linux-5.10/drivers/clk/zte/
Dclk-zx296702.c53 { .rate = 700000000, .cfg0 = 0x800405d1, .cfg1 = 0x04555555 },
54 { .rate = 800000000, .cfg0 = 0x80040691, .cfg1 = 0x04aaaaaa },
55 { .rate = 900000000, .cfg0 = 0x80040791, .cfg1 = 0x04000000 },
56 { .rate = 1000000000, .cfg0 = 0x80040851, .cfg1 = 0x04555555 },
57 { .rate = 1100000000, .cfg0 = 0x80040911, .cfg1 = 0x04aaaaaa },
58 { .rate = 1200000000, .cfg0 = 0x80040a11, .cfg1 = 0x04000000 },
Dclk.h17 u32 cfg1; member
34 .cfg1 = _cfg1, \
Dclk.c58 if (hw_cfg0 == config[i].cfg0 && hw_cfg1 == config[i].cfg1) in hw_to_idx()
101 writel_relaxed(config->cfg1, zx_pll->reg_base + CFG0_CFG1_OFFSET); in zx_pll_set_rate()
/kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/mt76x2/
Dphy.c187 u32 cfg0, cfg1; in mt76x2_configure_tx_delay() local
191 cfg1 = 0x00011414; in mt76x2_configure_tx_delay()
194 cfg1 = 0x00021414; in mt76x2_configure_tx_delay()
197 mt76_wr(dev, MT_TX_SW_CFG1, cfg1); in mt76x2_configure_tx_delay()
/kernel/linux/linux-5.10/drivers/iio/adc/
Dimx7d_adc.c233 u32 cfg1 = 0; in imx7d_adc_channel_set() local
240 cfg1 |= (IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN | in imx7d_adc_channel_set()
250 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(channel); in imx7d_adc_channel_set()
267 writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel); in imx7d_adc_channel_set()
/kernel/linux/linux-5.10/drivers/soc/qcom/
Dqcom-geni-se.c398 u32 cfg0, cfg1, cfg[NUM_PACKING_VECTORS] = {0}; in geni_se_config_packing() local
427 cfg1 = cfg[2] | (cfg[3] << PACKING_VECTOR_SHIFT); in geni_se_config_packing()
431 writel_relaxed(cfg1, se->base + SE_GENI_TX_PACKING_CFG1); in geni_se_config_packing()
435 writel_relaxed(cfg1, se->base + SE_GENI_RX_PACKING_CFG1); in geni_se_config_packing()
/kernel/linux/linux-5.10/arch/sparc/include/asm/
Dsbi.h21 /* 0x0014 */ u32 cfg1; /* Slot1 config reg */ member
/kernel/linux/linux-5.10/drivers/video/fbdev/nvidia/
Dnv_hw.c387 unsigned int MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
391 cfg1 = NV_RD32(par->PFB, 0x00000204); in nv4UpdateArbitrationSettings()
397 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv4UpdateArbitrationSettings()
400 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv4UpdateArbitrationSettings()
626 unsigned int MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
630 cfg1 = NV_RD32(par->PFB, 0x0204); in nv10UpdateArbitrationSettings()
637 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv10UpdateArbitrationSettings()
640 (char)(((cfg1 >> 4) & 0x0F) + ((cfg1 >> 31) & 0x01)); in nv10UpdateArbitrationSettings()
/kernel/linux/linux-5.10/drivers/net/ethernet/agere/
Det131x.c819 &macregs->cfg1); in et1310_config_mac_regs1()
861 writel(0, &macregs->cfg1); in et1310_config_mac_regs1()
869 u32 cfg1; in et1310_config_mac_regs2() local
875 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
889 cfg1 |= ET_MAC_CFG1_RX_ENABLE | ET_MAC_CFG1_TX_ENABLE | in et1310_config_mac_regs2()
892 cfg1 &= ~(ET_MAC_CFG1_LOOPBACK | ET_MAC_CFG1_RX_FLOW); in et1310_config_mac_regs2()
894 cfg1 |= ET_MAC_CFG1_RX_FLOW; in et1310_config_mac_regs2()
895 writel(cfg1, &mac->cfg1); in et1310_config_mac_regs2()
921 cfg1 = readl(&mac->cfg1); in et1310_config_mac_regs2()
922 } while ((cfg1 & ET_MAC_CFG1_WAIT) != ET_MAC_CFG1_WAIT && delay < 100); in et1310_config_mac_regs2()
[all …]
/kernel/linux/linux-5.10/sound/pci/
Dals4000.c692 u32 cfg1 = 0; in snd_als4000_set_addr() local
700 cfg1 |= (game_io | 1) << 16; in snd_als4000_set_addr()
702 cfg1 |= (opl_io | 1); in snd_als4000_set_addr()
703 snd_als4k_gcr_write_addr(iobase, ALS4K_GCRA8_LEGACY_CFG1, cfg1); in snd_als4000_set_addr()
/kernel/linux/linux-5.10/drivers/perf/
Dfsl_imx8_ddr_perf.c426 int cfg1 = event->attr.config1; in ddr_perf_event_add() local
439 cfg1 ^= AXI_MASKING_REVERT; in ddr_perf_event_add()
440 writel(cfg1, pmu->base + COUNTER_DPCR1); in ddr_perf_event_add()
/kernel/linux/linux-5.10/drivers/mtd/nand/raw/
Dqcom_nandc.c301 __le32 cfg1; member
449 u32 cfg0, cfg1; member
621 return &regs->cfg1; in offset_to_nandc_reg()
685 u32 cmd, cfg0, cfg1, ecc_bch_cfg; in update_rw_regs() local
700 cfg1 = host->cfg1; in update_rw_regs()
706 cfg1 = host->cfg1_raw; in update_rw_regs()
712 nandc_set_reg(nandc, NAND_DEV0_CFG1, cfg1); in update_rw_regs()
2585 host->cfg1 = 7 << NAND_RECOVERY_CYCLES in qcom_nand_attach_chip()
2624 host->cfg0, host->cfg1, host->ecc_buf_cfg, host->ecc_bch_cfg, in qcom_nand_attach_chip()
/kernel/linux/linux-5.10/drivers/video/fbdev/riva/
Driva_hw.c808 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv4UpdateArbitrationSettings() local
816 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); in nv4UpdateArbitrationSettings()
822 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv4UpdateArbitrationSettings()
824 sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01)); in nv4UpdateArbitrationSettings()
1071 unsigned int M, N, P, pll, MClk, NVClk, cfg1; in nv10UpdateArbitrationSettings() local
1079 cfg1 = NV_RD32(&chip->PFB[0x00000204/4], 0); in nv10UpdateArbitrationSettings()
1087 sim_data.mem_latency = (char)cfg1 & 0x0F; in nv10UpdateArbitrationSettings()
1089 sim_data.mem_page_miss = (char)(((cfg1 >> 4) &0x0F) + ((cfg1 >> 31) & 0x01)); in nv10UpdateArbitrationSettings()
/kernel/linux/linux-5.10/include/linux/
Dswitchtec.h230 struct partition_info cfg1; member
257 struct partition_info cfg1; member
/kernel/linux/linux-5.10/drivers/pci/controller/
Dpcie-altera.c326 u8 cfg1 = read ? pcie->pcie_data->cfgrd1 : pcie->pcie_data->cfgwr1; in get_tlp_header() local
330 cfg = (bus == pcie->root_bus_nr) ? cfg0 : cfg1; in get_tlp_header()
332 cfg = (bus > S10_RP_SECONDARY(pcie)) ? cfg0 : cfg1; in get_tlp_header()
/kernel/linux/linux-5.10/sound/pci/au88x0/
Dau88x0_core.c1097 dma->cfg1 = 0; in vortex_adbdma_setbuffers()
1102 dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize - 1); in vortex_adbdma_setbuffers()
1110 dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize - 1) << 0xc); in vortex_adbdma_setbuffers()
1135 hwwrite(vortex->mmio, VORTEX_ADBDMA_BUFCFG1 + (adbdma << 3), dma->cfg1); in vortex_adbdma_setbuffers()
1376 dma->cfg1 = 0; in vortex_wtdma_setbuffers()
1381 dma->cfg1 |= 0x88000000 | 0x44000000 | 0x30000000 | (psize-1); in vortex_wtdma_setbuffers()
1388 dma->cfg1 |= 0x80000000 | 0x40000000 | ((psize-1) << 0xc); in vortex_wtdma_setbuffers()
1406 hwwrite(vortex->mmio, VORTEX_WTDMA_BUFCFG1 + (wtdma << 3), dma->cfg1); in vortex_wtdma_setbuffers()
Dau88x0.h112 int cfg1; member
/kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/
Dintel_dsi_vbt.c278 u16 cfg0, cfg1; in chv_exec_gpio() local
318 cfg1 = CHV_GPIO_PAD_CFG1(family_num, gpio_index); in chv_exec_gpio()
321 vlv_iosf_sb_write(dev_priv, port, cfg1, 0); in chv_exec_gpio()
/kernel/linux/linux-5.10/sound/soc/stm/
Dstm32_i2s.c507 u32 cfgr, cfgr_mask, cfg1; in stm32_i2s_configure() local
543 cfg1 = I2S_CFG1_FTHVL_SET(fthlv - 1); in stm32_i2s_configure()
546 I2S_CFG1_FTHVL_MASK, cfg1); in stm32_i2s_configure()
/kernel/linux/linux-5.10/drivers/scsi/
Dqla1280.c2187 uint16_t hwrev, cfg1, cdma_conf; in qla1280_nvram_config() local
2191 cfg1 = RD_REG_WORD(&reg->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); in qla1280_nvram_config()
2196 cfg1 |= nv->isp_config.fifo_threshold << 4; in qla1280_nvram_config()
2198 cfg1 |= nv->isp_config.burst_enable << 2; in qla1280_nvram_config()
2199 WRT_REG_WORD(&reg->cfg_1, cfg1); in qla1280_nvram_config()
2204 uint16_t cfg1, term; in qla1280_nvram_config() local
2207 cfg1 = nv->isp_config.fifo_threshold << 4; in qla1280_nvram_config()
2208 cfg1 |= nv->isp_config.burst_enable << 2; in qla1280_nvram_config()
2211 cfg1 |= BIT_13; in qla1280_nvram_config()
2212 WRT_REG_WORD(&reg->cfg_1, cfg1); in qla1280_nvram_config()
/kernel/linux/linux-5.10/drivers/net/ethernet/atheros/
Dag71xx.c1109 u32 cfg1, cfg2; in ag71xx_mac_link_up() local
1143 cfg1 = ag71xx_rr(ag, AG71XX_REG_MAC_CFG1); in ag71xx_mac_link_up()
1144 cfg1 &= ~(MAC_CFG1_TFC | MAC_CFG1_RFC); in ag71xx_mac_link_up()
1146 cfg1 |= MAC_CFG1_TFC; in ag71xx_mac_link_up()
1149 cfg1 |= MAC_CFG1_RFC; in ag71xx_mac_link_up()
1150 ag71xx_wr(ag, AG71XX_REG_MAC_CFG1, cfg1); in ag71xx_mac_link_up()

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