| /kernel/linux/linux-5.10/drivers/clk/ti/ |
| D | clk-33xx.c | 278 struct clk *clk1, *clk2; in am33xx_dt_clk_init() local
302 clk2 = clk_get_sys(NULL, "timer3_fck"); in am33xx_dt_clk_init()
303 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
305 clk2 = clk_get_sys(NULL, "timer6_fck"); in am33xx_dt_clk_init()
306 clk_set_parent(clk2, clk1); in am33xx_dt_clk_init()
315 clk2 = clk_get_sys(NULL, "clkdiv32k_ick"); in am33xx_dt_clk_init()
316 clk_set_parent(clk1, clk2); in am33xx_dt_clk_init()
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| D | clk-43xx.c | 277 struct clk *clk1, *clk2; in am43xx_dt_clk_init() local
299 clk2 = clk_get_sys(NULL, "dpll_core_m5_ck"); in am43xx_dt_clk_init()
300 clk_set_parent(clk1, clk2); in am43xx_dt_clk_init()
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| /kernel/linux/linux-5.10/drivers/clocksource/ |
| D | timer-sp804.c | 274 struct clk *clk1, *clk2; in sp804_of_init() local
299 clk2 = of_clk_get(np, 1); in sp804_of_init()
300 if (IS_ERR(clk2)) { in sp804_of_init()
302 (int)PTR_ERR(clk2)); in sp804_of_init()
303 clk2 = NULL; in sp804_of_init()
306 clk2 = clk1; in sp804_of_init()
317 ret = sp804_clockevents_init(timer2_base, irq, clk2, name); in sp804_of_init()
332 name, clk2, 1); in sp804_of_init()
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| /kernel/linux/linux-5.10/drivers/phy/allwinner/ |
| D | phy-sun4i-usb.c | 136 struct clk *clk2; member
278 ret = clk_prepare_enable(phy->clk2); in sun4i_usb_phy_init()
286 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_init()
357 clk_disable_unprepare(phy->clk2); in sun4i_usb_phy_exit()
783 phy->clk2 = devm_clk_get(dev, name); in sun4i_usb_phy_probe()
784 if (IS_ERR(phy->clk2)) { in sun4i_usb_phy_probe()
786 return PTR_ERR(phy->clk2); in sun4i_usb_phy_probe()
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| /kernel/linux/linux-5.10/drivers/clk/rockchip/ |
| D | clk-rk3188.c | 812 struct clk *clk1, *clk2; in rk3188a_clk_init() local
832 clk2 = __clk_lookup("gpll"); in rk3188a_clk_init()
833 if (clk1 && clk2) { in rk3188a_clk_init()
836 ret = clk_set_parent(clk1, clk2); in rk3188a_clk_init()
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| /kernel/linux/linux-5.10/Documentation/devicetree/bindings/arm/tegra/ |
| D | nvidia,tegra186-pmc.txt | 59 pex-clk-bias pex-clk3 pex-clk2 pex-clk1
|
| /kernel/linux/linux-5.10/arch/arm/boot/dts/ |
| D | lpc4350-hitex-eval.dts | 230 pins = "clk0", "clk1", "clk2", "clk3";
|
| D | tegra30-colibri.dtsi | 250 clk2-out-pw5 {
611 clk2-req-pcc5 {
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| D | lpc4357-ea4357-devkit.dts | 260 pins = "clk0", "clk1", "clk2", "clk3";
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| D | tegra30-apalis.dtsi | 151 clk2-out-pw5 {
445 clk2-req-pcc5 {
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| D | tegra30-apalis-v1.1.dtsi | 152 clk2-out-pw5 {
446 clk2-req-pcc5 {
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| D | tegra124-apalis.dtsi | 327 clk2-out-pw5 { /* D5 GPIO */
376 clk2-req-pcc5 { /* D4 GPIO */
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| D | tegra124-apalis-v1.2.dtsi | 330 clk2-out-pw5 { /* D5 GPIO */
379 clk2-req-pcc5 { /* D4 GPIO */
|
| /kernel/linux/linux-5.10/drivers/pinctrl/ |
| D | pinctrl-lpc18xx.c | 416 LPC_N(clk2, 0xc08, EMC, CLKOUT, R, R, SDMMC, EMC_ALT,I2S0_TX_MCLK,I2S1, 0, HS);
625 LPC18XX_PIN(clk2, PIN_CLK2),
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| /kernel/linux/linux-5.10/arch/arm64/boot/dts/nvidia/ |
| D | tegra210.dtsi | 926 pins = "pex-bias", "pex-clk1", "pex-clk2";
933 pins = "pex-bias", "pex-clk1", "pex-clk2";
|
| /kernel/linux/linux-5.10/arch/arm64/boot/dts/qcom/ |
| D | msm8916.dtsi | 1344 "mi2s-bit-clk2",
|
| /kernel/linux/patches/linux-5.10/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 14599 + struct clk *clk1 = NULL, *clk2 = NULL;
14620 + clk2 = of_clk_get(node, 1);
14621 + if (IS_ERR(clk2)) {
14623 + (int)PTR_ERR(clk2));
14626 + clk_prepare_enable(clk2);
14627 + rate2 = clk_get_rate(clk2);
|
| /kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
| D | 0038_linux_drivers_mxc.patch | 166461 + unsigned long clk1, clk2;
166464 + clk2 = clk_get_rate(hantro_clk_g2);
166466 + if (!clk1 || !clk2)
166470 + if ((clk1 >= HANTRO_CLK_VOL_THR) || (clk2 >= HANTRO_CLK_VOL_THR))
|
| /kernel/linux/patches/linux-5.10/unionpi_tiger_pacth/ |
| D | linux-5.10.patch | 23547 + unsigned int clk2;
|
| /kernel/linux/patches/linux-4.19/hispark_taurus_patch/ |
| D | hispark_taurus.patch | 297558 + struct clk *clk1 = NULL, *clk2 = NULL;
297579 + clk2 = of_clk_get(node, 1);
297580 + if (IS_ERR(clk2)) {
297582 + (int)PTR_ERR(clk2));
297585 + clk_prepare_enable(clk2);
297586 + rate2 = clk_get_rate(clk2);
|