Searched refs:control1 (Results 1 – 13 of 13) sorted by relevance
46 unsigned int control1; member64 unsigned int control1 = 0; in loongson3_reg_setup() local72 control1 |= LOONGSON3_PERFCTRL_EVENT(0, ctr[0].event) | in loongson3_reg_setup()75 control1 |= LOONGSON3_PERFCTRL_KERNEL; in loongson3_reg_setup()77 control1 |= LOONGSON3_PERFCTRL_USER; in loongson3_reg_setup()92 control1 |= LOONGSON3_PERFCTRL_EXL; in loongson3_reg_setup()96 reg.control1 = control1; in loongson3_reg_setup()116 reg.control1 |= (LOONGSON3_PERFCTRL_W|LOONGSON3_PERFCTRL_M); in loongson3_cpu_start()120 write_c0_perflo1(reg.control1); in loongson3_cpu_start()173 write_c0_perflo1(reg.control1); in loongson3_starting_cpu()
358 uint8_t control1 = 0; in max8973_init_dcdc() local368 control1 = data & MAX8973_RAMP_MASK; in max8973_init_dcdc()369 switch (control1) { in max8973_init_dcdc()385 control1 |= MAX8973_SNS_ENABLE; in max8973_init_dcdc()388 control1 |= MAX8973_NFSR_ENABLE; in max8973_init_dcdc()391 control1 |= MAX8973_AD_ENABLE; in max8973_init_dcdc()394 control1 |= MAX8973_BIAS_ENABLE; in max8973_init_dcdc()401 control1 |= MAX8973_FREQSHIFT_9PER; in max8973_init_dcdc()448 ret = regmap_write(max->regmap, MAX8973_CONTROL1, control1); in max8973_init_dcdc()
49 uint32_t control1; member265 desc->control1 = MXS_DCP_CONTROL1_CIPHER_SELECT_AES128; in mxs_dcp_run_aes()268 desc->control1 |= MXS_DCP_CONTROL1_CIPHER_MODE_ECB; in mxs_dcp_run_aes()270 desc->control1 |= MXS_DCP_CONTROL1_CIPHER_MODE_CBC; in mxs_dcp_run_aes()569 desc->control1 = actx->alg; in mxs_dcp_run_sha()
214 u32 control1; member
145 __le32 control1; member
208 desc->dma64.control1 = cpu_to_le32(ctl1); in op64_fill_descriptor()
377 __le32 control1; member596 u32 control1; member
114 cdesc->control_data.control1 = 0; in safexcel_context_control()194 cdesc->control_data.control1 |= in safexcel_context_control()
513 cdesc->control_data.control1 = ctx->mode; in safexcel_context_control()
752 u8 control1; /* board interrupts enable */ member
692 outb(0x00,PTR2USHORT(&ha->plx->control1)); in gdth_init_pci()900 outb(0x03, PTR2USHORT(&ha->plx->control1)); in gdth_enable_int()
5270 u16 control1; in bnx2x_initialize_sgmii_process() local5277 &control1); in bnx2x_initialize_sgmii_process()5278 control1 |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_INVERT_SIGNAL_DETECT; in bnx2x_initialize_sgmii_process()5280 control1 &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE | in bnx2x_initialize_sgmii_process()5286 control1); in bnx2x_initialize_sgmii_process()
4466 __le16 control1; member