/kernel/linux/linux-5.10/drivers/soc/samsung/ |
D | s3c-pm-check.c | 37 static u32 *crcs; /* allocated over suspend/resume */ variable 99 crcs = kmalloc(crc_size+4, GFP_KERNEL); in s3c_pm_check_prepare() 100 if (crcs == NULL) in s3c_pm_check_prepare() 130 if (crcs != NULL) in s3c_pm_check_store() 131 s3c_pm_run_sysram(s3c_pm_makecheck, crcs); in s3c_pm_check_store() 185 if (in_region(ptr, left, crcs, crc_size)) { in s3c_pm_runcheck() 216 if (crcs != NULL) in s3c_pm_check_restore() 217 s3c_pm_run_sysram(s3c_pm_runcheck, crcs); in s3c_pm_check_restore() 230 kfree(crcs); in s3c_pm_check_cleanup() 231 crcs = NULL; in s3c_pm_check_cleanup()
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/kernel/linux/linux-5.10/include/drm/ |
D | drm_debugfs_crc.h | 36 uint32_t crcs[DRM_MAX_CRC_NR]; member 65 uint32_t frame, uint32_t *crcs); 68 uint32_t frame, uint32_t *crcs) in drm_crtc_add_crc_entry() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/amdgpu_dm/ |
D | amdgpu_dm_crc.c | 297 uint32_t crcs[3]; in amdgpu_dm_crtc_handle_crc_irq() local 322 &crcs[0], &crcs[1], &crcs[2])) in amdgpu_dm_crtc_handle_crc_irq() 326 drm_crtc_accurate_vblank_count(crtc), crcs); in amdgpu_dm_crtc_handle_crc_irq()
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/kernel/linux/linux-5.10/drivers/gpu/drm/ |
D | drm_debugfs_crc.c | 335 sprintf(buf + 10 + i * 11, " 0x%08x", entry->crcs[i]); in crtc_crc_read() 394 uint32_t frame, uint32_t *crcs) in drm_crtc_add_crc_entry() argument 427 memcpy(&entry->crcs, crcs, sizeof(*crcs) * crc->values_cnt); in drm_crtc_add_crc_entry()
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D | drm_dp_helper.c | 1577 uint32_t crcs[3]; in drm_dp_aux_crc_work() local 1605 crcs[0] = crc_bytes[0] | crc_bytes[1] << 8; in drm_dp_aux_crc_work() 1606 crcs[1] = crc_bytes[2] | crc_bytes[3] << 8; in drm_dp_aux_crc_work() 1607 crcs[2] = crc_bytes[4] | crc_bytes[5] << 8; in drm_dp_aux_crc_work() 1608 drm_crtc_add_crc_entry(crtc, false, 0, crcs); in drm_dp_aux_crc_work()
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/kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
D | i915_trace.h | 77 TP_PROTO(struct intel_crtc *crtc, const u32 *crcs), 78 TP_ARGS(crtc, crcs), 84 __array(u32, crcs, 5) 91 memcpy(__entry->crcs, crcs, sizeof(__entry->crcs)); 96 __entry->crcs[0], __entry->crcs[1], __entry->crcs[2], 97 __entry->crcs[3], __entry->crcs[4])
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D | i915_irq.c | 1214 u32 crcs[5] = { crc0, crc1, crc2, crc3, crc4 }; in display_pipe_crc_irq_handler() local 1216 trace_intel_pipe_crc(crtc, crcs); in display_pipe_crc_irq_handler() 1237 crcs); in display_pipe_crc_irq_handler()
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/kernel/linux/linux-5.10/arch/powerpc/platforms/44x/ |
D | fsp2.c | 191 u32 crcs = mfcmu(CMUN_CRCS); in rst_wrn_handler() local 192 switch (crcs & CRCS_STAT_MASK) { in rst_wrn_handler() 196 panic("Unknown external reset: CRCS=0x%x", crcs); in rst_wrn_handler()
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/kernel/linux/linux-5.10/drivers/infiniband/hw/qib/ |
D | qib_driver.c | 450 u32 eflags, etype, tlen, i = 0, updegr = 0, crcs = 0; in qib_kreceive() local 508 crcs += qib_rcv_hdrerr(rcd, ppd, rcd->ctxt, eflags, l, in qib_kreceive() 512 if (crcs) in qib_kreceive() 513 crcs--; in qib_kreceive() 583 return crcs; in qib_kreceive()
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D | qib_iba6120.c | 1590 u32 istat, ctxtrbits, rmask, crcs = 0; in qib_6120intr() local 1645 crcs += qib_kreceive(dd->rcd[i], in qib_6120intr() 1651 if (crcs) { in qib_6120intr() 1654 cntr += crcs; in qib_6120intr()
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/kernel/linux/linux-5.10/include/linux/ |
D | module.h | 384 const s32 *crcs; member 599 const s32 *crcs; member
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/kernel/linux/linux-5.10/kernel/ |
D | module.c | 464 { mod->syms, mod->syms + mod->num_syms, mod->crcs, in each_symbol_section() 536 fsa->crc = symversion(syms->crcs, symnum); in check_exported_symbol() 3303 mod->crcs = section_addr(info, "__kcrctab"); in find_module_sections() 3501 if ((mod->num_syms && !mod->crcs) in check_module_license_and_versions()
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/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/ |
D | 0020_linux_drivers_gpu.patch | 17512 + uint32_t crcs[6] = {0, 0, 0, 0, 0, 0}; 17527 + crcs[2] = dpu_crtc->crc_red; 17528 + crcs[1] = dpu_crtc->crc_green; 17529 + crcs[0] = dpu_crtc->crc_blue; 17540 + crcs[5] = aux_dpu_crtc->crc_red; 17541 + crcs[4] = aux_dpu_crtc->crc_green; 17542 + crcs[3] = aux_dpu_crtc->crc_blue; 17546 + drm_crtc_add_crc_entry(&dpu_crtc->base, false, 0, crcs);
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