Home
last modified time | relevance | path

Searched refs:ddr50 (Results 1 – 24 of 24) sorted by relevance

/kernel/linux/linux-5.10/Documentation/devicetree/bindings/mmc/
Dsdhci-omap.txt15 "ddr50-rev11", "sdr104-rev11", "ddr50", "sdr104",
Dsdhci-st.txt57 - sd-uhs-ddr50: To enable the DDR50 in the mmcss.
109 sd-uhs-ddr50;
Dbrcm,sdhci-brcmstb.txt22 sd-uhs-ddr50;
/kernel/linux/linux-5.10/arch/arm/boot/dts/
Dstih410-b2120.dts34 sd-uhs-ddr50;
Dstih418-b2199.dts84 sd-uhs-ddr50;
Ddra72-evm.dts94 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
Ddra72-evm-revc.dts124 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
Ddra7-evm.dts389 …pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50-rev11", "sdr104-rev11", "ddr50"…
Ddra71-evm.dts201 pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
Dstm32mp157c-ed1.dts340 sd-uhs-ddr50;
Drk3288-firefly-reload.dts265 sd-uhs-ddr50;
Dexynos5420-arndale-octa.dts806 sd-uhs-ddr50;
Dqcom-ipq8064.dtsi784 sd-uhs-ddr50;
Dexynos5422-odroid-core.dtsi981 sd-uhs-ddr50;
/kernel/linux/linux-5.10/arch/arm64/boot/dts/amlogic/
Dmeson-gxl-s905x-libretech-cc-v2.dts255 sd-uhs-ddr50;
Dmeson-gx-libretech-pc.dtsi382 sd-uhs-ddr50;
Dmeson-gxbb-nanopi-k2.dts309 sd-uhs-ddr50;
Dmeson-gxbb-odroidc2.dts326 sd-uhs-ddr50;
/kernel/linux/linux-5.10/include/linux/
Drtsx_pci.h1260 #define SET_CLOCK_PHASE(sdr104, sdr50, ddr50) \ argument
1261 (((ddr50) << 16) | ((sdr50) << 8) | (sdr104))
/kernel/linux/linux-5.10/arch/arm64/boot/dts/ti/
Dk3-am65-main.dtsi276 ti,otap-del-sel-ddr50 = <0x5>;
298 ti,otap-del-sel-ddr50 = <0x4>;
Dk3-j7200-main.dtsi417 ti,otap-del-sel-ddr50 = <0xc>;
/kernel/linux/linux-5.10/arch/powerpc/boot/dts/
Dfsp2.dts506 sd-uhs-ddr50;
/kernel/linux/linux-5.10/arch/arm64/boot/dts/zte/
Dzx296718.dtsi345 sd-uhs-ddr50;
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0030_linux_drivers_pci_misc_nvmem_of_mtd_mmc.patch12349 - "clk-phase-uhs-ddr50");