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Searched refs:dpp_inst (Results 1 – 11 of 11) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.c47 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk) in dccg2_update_dpp_dto() argument
64 REG_SET_2(DPPCLK_DTO_PARAM[dpp_inst], 0, in dccg2_update_dpp_dto()
68 DPPCLK_DTO_ENABLE[dpp_inst], 1); in dccg2_update_dpp_dto()
71 DPPCLK_DTO_ENABLE[dpp_inst], 0); in dccg2_update_dpp_dto()
74 dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk; in dccg2_update_dpp_dto()
Ddcn20_dccg.h122 void dccg2_update_dpp_dto(struct dccg *dccg, int dpp_inst, int req_dppclk);
Ddcn20_hwseq.h94 unsigned int dpp_inst,
Ddcn20_hwseq.c417 unsigned int dpp_inst, in dcn20_dpp_pg_control() argument
428 switch (dpp_inst) { in dcn20_dpp_pg_control()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Ddccg.h41 int dpp_inst,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dce/
Ddmub_psr.c242 copy_settings_data->dpp_inst = pipe_ctx->plane_res.dpp->inst; in dmub_psr_copy_settings()
244 copy_settings_data->dpp_inst = 0; in dmub_psr_copy_settings()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
Ddcn20_clk_mgr.c110 int dpp_inst, dppclk_khz, prev_dppclk_khz; in dcn20_update_clocks_update_dpp_dto() local
115 dpp_inst = i; in dcn20_update_clocks_update_dpp_dto()
122 clk_mgr->dccg, dpp_inst, dppclk_khz); in dcn20_update_clocks_update_dpp_dto()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/
Dhw_sequencer_private.h116 unsigned int dpp_inst,
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/
Ddcn10_hw_sequencer.h97 unsigned int dpp_inst,
Ddcn10_hw_sequencer.c539 unsigned int dpp_inst, in dcn10_dpp_pg_control() argument
550 switch (dpp_inst) { in dcn10_dpp_pg_control()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dmub/inc/
Ddmub_cmd.h562 uint8_t dpp_inst; member