Searched refs:drained (Results 1 – 12 of 12) sorted by relevance
26 - richtek,avg-input-current-regulation: integer, input current value in uA drained by the
142 complete(&dct->drained); in rsc_event_notifier()203 wait_for_completion(&dct->drained); in _mlx5_core_destroy_dct()220 init_completion(&dct->drained); in mlx5_core_create_dct()
499 struct completion drained; member
2717 bool drained = false; in try_charge() local2777 if (!drained) { in try_charge()2779 drained = true; in try_charge()3369 bool drained = false; in mem_cgroup_resize_max() local3400 if (!drained) { in mem_cgroup_resize_max()3402 drained = true; in mem_cgroup_resize_max()6382 bool drained = false; in memory_high_write() local6403 if (!drained) { in memory_high_write()6405 drained = true; in memory_high_write()6431 bool drained = false; in memory_max_write() local[all …]
4388 bool drained = false; in __alloc_pages_direct_reclaim() local4402 if (!page && !drained) { in __alloc_pages_direct_reclaim()4411 drained = true; in __alloc_pages_direct_reclaim()
100 hardware queue will be drained in sequence according to their mapping.
2960 bool drained; in drain_workqueue() local2963 drained = !pwq->nr_active && list_empty(&pwq->delayed_works); in drain_workqueue()2966 if (drained) in drain_workqueue()
186 suspend operations. Work items on the wq are drained and no
550 serial port should wait for data to be drained while
1052 on systems with an outer cache, the store buffer is drained
33204 + will only occur once the FQ has been drained. In33286 + to be drained */33319 + /* Wait for the ORL to have been completely drained */
186196 + /*Set the port pin to be open drained*/