| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gt/ |
| D | intel_reset.c | 179 intel_engine_mask_t engine_mask, in i915_do_reset() argument
208 intel_engine_mask_t engine_mask, in g33_do_reset() argument
218 intel_engine_mask_t engine_mask, in g4x_do_reset() argument
254 static int ilk_do_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask, in ilk_do_reset() argument
315 intel_engine_mask_t engine_mask, in gen6_reset_engines() argument
328 if (engine_mask == ALL_ENGINES) { in gen6_reset_engines()
334 for_each_engine_masked(engine, gt, engine_mask, tmp) { in gen6_reset_engines()
447 intel_engine_mask_t engine_mask, in gen11_reset_engines() argument
465 if (engine_mask == ALL_ENGINES) { in gen11_reset_engines()
469 for_each_engine_masked(engine, gt, engine_mask, tmp) { in gen11_reset_engines()
[all …]
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| D | intel_reset.h | 27 intel_engine_mask_t engine_mask,
55 int __intel_gt_reset(struct intel_gt *gt, intel_engine_mask_t engine_mask);
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| D | intel_engine_cs.c | 477 info->engine_mask = INTEL_INFO(i915)->platform_engine_mask; in init_engine_mask()
480 return info->engine_mask; in init_engine_mask()
495 info->engine_mask &= ~BIT(_VCS(i)); in init_engine_mask()
519 info->engine_mask &= ~BIT(_VECS(i)); in init_engine_mask()
527 return info->engine_mask; in init_engine_mask()
539 const unsigned int engine_mask = init_engine_mask(gt); in intel_engines_init_mmio() local
544 drm_WARN_ON(&i915->drm, engine_mask == 0); in intel_engines_init_mmio()
545 drm_WARN_ON(&i915->drm, engine_mask & in intel_engines_init_mmio()
567 if (drm_WARN_ON(&i915->drm, mask != engine_mask)) in intel_engines_init_mmio()
568 gt->info.engine_mask = mask; in intel_engines_init_mmio()
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| D | intel_gt_types.h | 116 intel_engine_mask_t engine_mask; member
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| D | intel_gt.h | 52 intel_engine_mask_t engine_mask);
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| D | intel_gt.c | 164 intel_engine_mask_t engine_mask) in intel_gt_clear_error_registers() argument
201 for_each_engine_masked(engine, gt, engine_mask, id) in intel_gt_clear_error_registers()
662 drm_printf(p, "available engines: %x\n", info->engine_mask); in intel_gt_info_print()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/gvt/ |
| D | scheduler.h | 145 intel_engine_mask_t engine_mask);
150 intel_engine_mask_t engine_mask,
164 intel_engine_mask_t engine_mask);
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| D | execlist.c | 523 intel_engine_mask_t engine_mask) in clean_execlist() argument
530 for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) { in clean_execlist()
538 intel_engine_mask_t engine_mask) in reset_execlist() argument
544 for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) in reset_execlist()
549 intel_engine_mask_t engine_mask) in init_execlist() argument
551 reset_execlist(vgpu, engine_mask); in init_execlist()
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| D | vgpu.c | 539 intel_engine_mask_t engine_mask) in intel_gvt_reset_vgpu_locked() argument
543 intel_engine_mask_t resetting_eng = dmlr ? ALL_ENGINES : engine_mask; in intel_gvt_reset_vgpu_locked()
547 vgpu->id, dmlr, engine_mask); in intel_gvt_reset_vgpu_locked()
564 if (engine_mask == ALL_ENGINES || dmlr) { in intel_gvt_reset_vgpu_locked()
566 if (engine_mask == ALL_ENGINES) in intel_gvt_reset_vgpu_locked()
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| D | gvt.h | 145 int (*init)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
146 void (*clean)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
147 void (*reset)(struct intel_vgpu *vgpu, intel_engine_mask_t engine_mask);
477 intel_engine_mask_t engine_mask);
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| D | scheduler.c | 999 intel_engine_mask_t engine_mask) in intel_vgpu_clean_workloads() argument
1008 for_each_engine_masked(engine, &dev_priv->gt, engine_mask, tmp) { in intel_vgpu_clean_workloads()
1295 intel_engine_mask_t engine_mask) in intel_vgpu_reset_submission() argument
1302 intel_vgpu_clean_workloads(vgpu, engine_mask); in intel_vgpu_reset_submission()
1303 s->ops->reset(vgpu, engine_mask); in intel_vgpu_reset_submission()
1422 intel_engine_mask_t engine_mask, in intel_vgpu_select_submission_ops() argument
1437 interface == 0 && engine_mask != ALL_ENGINES)) in intel_vgpu_select_submission_ops()
1441 s->ops->clean(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
1451 ret = ops[interface]->init(vgpu, engine_mask); in intel_vgpu_select_submission_ops()
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| D | execlist.h | 186 intel_engine_mask_t engine_mask);
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| D | handlers.c | 316 intel_engine_mask_t engine_mask = 0; in gdrst_mmio_write() local
324 engine_mask = ALL_ENGINES; in gdrst_mmio_write()
328 engine_mask |= BIT(RCS0); in gdrst_mmio_write()
332 engine_mask |= BIT(VCS0); in gdrst_mmio_write()
336 engine_mask |= BIT(BCS0); in gdrst_mmio_write()
340 engine_mask |= BIT(VECS0); in gdrst_mmio_write()
344 engine_mask |= BIT(VCS1); in gdrst_mmio_write()
350 engine_mask &= vgpu->gvt->gt->info.engine_mask; in gdrst_mmio_write()
354 intel_gvt_reset_vgpu_locked(vgpu, false, engine_mask); in gdrst_mmio_write()
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| /kernel/linux/linux-5.10/drivers/net/wireless/mediatek/mt76/ |
| D | mt76x02_dfs.c | 616 u32 engine_mask; in mt76x02_dfs_tasklet() local
640 engine_mask = mt76_rr(dev, MT_BBP(DFS, 1)); in mt76x02_dfs_tasklet()
641 if (!(engine_mask & 0xf)) in mt76x02_dfs_tasklet()
647 if (!(engine_mask & (1 << i))) in mt76x02_dfs_tasklet()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/selftests/ |
| D | mock_gem_device.c | 197 i915->gt.info.engine_mask = BIT(0); in mock_gem_device()
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| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/ |
| D | i915_drv.h | 1248 for ((tmp__) = (mask__) & (gt__)->info.engine_mask; \
1616 #define __HAS_ENGINE(engine_mask, id) ((engine_mask) & BIT(id)) argument
1617 #define HAS_ENGINE(gt, id) __HAS_ENGINE((gt)->info.engine_mask, id)
1622 ((gt)->info.engine_mask & \
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