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Searched refs:gds (Results 1 – 10 of 10) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_cs.c515 struct amdgpu_bo *gds; in amdgpu_cs_parser_bos() local
615 gds = p->bo_list->gds_obj; in amdgpu_cs_parser_bos()
628 if (gds) { in amdgpu_cs_parser_bos()
629 p->job->gds_base = amdgpu_bo_gpu_offset(gds) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
630 p->job->gds_size = amdgpu_bo_size(gds) >> PAGE_SHIFT; in amdgpu_cs_parser_bos()
Damdgpu_kms.c612 gds_info.compute_partition_size = adev->gds.gds_size; in amdgpu_info_ioctl()
613 gds_info.gds_total_size = adev->gds.gds_size; in amdgpu_info_ioctl()
614 gds_info.gws_per_compute_partition = adev->gds.gws_size; in amdgpu_info_ioctl()
615 gds_info.oa_per_compute_partition = adev->gds.oa_size; in amdgpu_info_ioctl()
Dgfx_v9_0.c4472 WREG32_SOC15(GC, 0, mmGDS_VMID0_SIZE, adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
4484 adev->gds.gds_size); in gfx_v9_0_do_edc_gds_workarounds()
5321 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v9_0_ring_emit_ib_compute()
6920 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
6924 adev->gds.gds_size = 0x1000; in gfx_v9_0_set_gds_init()
6927 adev->gds.gds_size = 0x10000; in gfx_v9_0_set_gds_init()
6934 adev->gds.gds_compute_max_wave_id = 0x7ff; in gfx_v9_0_set_gds_init()
6937 adev->gds.gds_compute_max_wave_id = 0x27f; in gfx_v9_0_set_gds_init()
6941 adev->gds.gds_compute_max_wave_id = 0x77; /* raven2 */ in gfx_v9_0_set_gds_init()
6943 adev->gds.gds_compute_max_wave_id = 0x15f; /* raven1 */ in gfx_v9_0_set_gds_init()
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Damdgpu_amdkfd.c580 return adev->gds.gws_size; in amdgpu_amdkfd_get_num_gws()
Damdgpu_ttm.c1986 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GDS, adev->gds.gds_size); in amdgpu_ttm_init()
1992 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_GWS, adev->gds.gws_size); in amdgpu_ttm_init()
1998 r = amdgpu_ttm_init_on_chip(adev, AMDGPU_PL_OA, adev->gds.oa_size); in amdgpu_ttm_init()
Dgfx_v7_0.c2308 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v7_0_ring_emit_ib_compute()
5147 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v7_0_set_gds_init()
5148 adev->gds.gws_size = 64; in gfx_v7_0_set_gds_init()
5149 adev->gds.oa_size = 16; in gfx_v7_0_set_gds_init()
5150 adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); in gfx_v7_0_set_gds_init()
Dmes_v10_1.c237 mes_set_hw_res_pkt.gds_size = adev->gds.gds_size; in mes_v10_1_set_hw_resources()
Damdgpu.h914 struct amdgpu_gds gds; member
Dgfx_v8_0.c6166 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v8_0_ring_emit_ib_compute()
7028 adev->gds.gds_size = RREG32(mmGDS_VMID0_SIZE); in gfx_v8_0_set_gds_init()
7029 adev->gds.gws_size = 64; in gfx_v8_0_set_gds_init()
7030 adev->gds.oa_size = 16; in gfx_v8_0_set_gds_init()
7031 adev->gds.gds_compute_max_wave_id = RREG32(mmGDS_COMPUTE_MAX_WAVE_ID); in gfx_v8_0_set_gds_init()
Dgfx_v10_0.c7845 amdgpu_ring_write(ring, ring->adev->gds.gds_compute_max_wave_id); in gfx_v10_0_ring_emit_ib_compute()
8094 gds_addr = ALIGN(csa_addr + AMDGPU_CSA_SIZE - adev->gds.gds_size, in gfx_v10_0_ring_emit_de_meta()
8763 adev->gds.gds_size = 0x10000; in gfx_v10_0_set_gds_init()
8764 adev->gds.gds_compute_max_wave_id = total_cu * 32 - 1; in gfx_v10_0_set_gds_init()
8765 adev->gds.gws_size = 64; in gfx_v10_0_set_gds_init()
8766 adev->gds.oa_size = 16; in gfx_v10_0_set_gds_init()