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/kernel/linux/linux-5.10/drivers/media/platform/davinci/
Dvpbe_display.c41 struct vpbe_layer *layer);
62 struct vpbe_layer *layer) in vpbe_isr_even_field() argument
64 if (layer->cur_frm == layer->next_frm) in vpbe_isr_even_field()
67 layer->cur_frm->vb.vb2_buf.timestamp = ktime_get_ns(); in vpbe_isr_even_field()
68 vb2_buffer_done(&layer->cur_frm->vb.vb2_buf, VB2_BUF_STATE_DONE); in vpbe_isr_even_field()
70 layer->cur_frm = layer->next_frm; in vpbe_isr_even_field()
74 struct vpbe_layer *layer) in vpbe_isr_odd_field() argument
80 if (list_empty(&layer->dma_queue) || in vpbe_isr_odd_field()
81 (layer->cur_frm != layer->next_frm)) { in vpbe_isr_odd_field()
91 layer->next_frm = list_entry(layer->dma_queue.next, in vpbe_isr_odd_field()
[all …]
Dvpbe_osd.c102 #define is_osd_win(layer) (((layer) == WIN_OSD0) || ((layer) == WIN_OSD1)) argument
103 #define is_vid_win(layer) (((layer) == WIN_VID0) || ((layer) == WIN_VID1)) argument
409 static void _osd_set_zoom(struct osd_state *sd, enum osd_layer layer, in _osd_set_zoom() argument
415 switch (layer) { in _osd_set_zoom()
443 static void _osd_disable_layer(struct osd_state *sd, enum osd_layer layer) in _osd_disable_layer() argument
445 switch (layer) { in _osd_disable_layer()
463 static void osd_disable_layer(struct osd_state *sd, enum osd_layer layer) in osd_disable_layer() argument
466 struct osd_window_state *win = &osd->win[layer]; in osd_disable_layer()
477 _osd_disable_layer(sd, layer); in osd_disable_layer()
488 static void _osd_enable_layer(struct osd_state *sd, enum osd_layer layer) in _osd_enable_layer() argument
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/kernel/linux/linux-5.10/drivers/media/dvb-frontends/
Dmb86a20s.c377 unsigned layer) in mb86a20s_get_modulation() argument
386 if (layer >= ARRAY_SIZE(reg)) in mb86a20s_get_modulation()
388 rc = mb86a20s_writereg(state, 0x6d, reg[layer]); in mb86a20s_get_modulation()
409 unsigned layer) in mb86a20s_get_fec() argument
419 if (layer >= ARRAY_SIZE(reg)) in mb86a20s_get_fec()
421 rc = mb86a20s_writereg(state, 0x6d, reg[layer]); in mb86a20s_get_fec()
444 unsigned layer) in mb86a20s_get_interleaving() argument
457 if (layer >= ARRAY_SIZE(reg)) in mb86a20s_get_interleaving()
459 rc = mb86a20s_writereg(state, 0x6d, reg[layer]); in mb86a20s_get_interleaving()
470 unsigned layer) in mb86a20s_get_segment_count() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/sun4i/
Dsun4i_layer.c20 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_reset() local
35 plane->state->zpos = layer->id; in sun4i_backend_layer_reset()
69 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_atomic_disable() local
70 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_disable()
72 sun4i_backend_layer_enable(backend, layer->id, false); in sun4i_backend_layer_atomic_disable()
87 struct sun4i_layer *layer = plane_to_sun4i_layer(plane); in sun4i_backend_layer_atomic_update() local
88 struct sun4i_backend *backend = layer->backend; in sun4i_backend_layer_atomic_update()
91 sun4i_backend_cleanup_layer(backend, layer->id); in sun4i_backend_layer_atomic_update()
99 sun4i_backend_update_layer_frontend(backend, layer->id, in sun4i_backend_layer_atomic_update()
103 sun4i_backend_update_layer_formats(backend, layer->id, plane); in sun4i_backend_layer_atomic_update()
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Dsun8i_ui_layer.h17 #define SUN8I_MIXER_CHAN_UI_LAYER_ATTR(base, layer) \ argument
18 ((base) + 0x20 * (layer) + 0x0)
19 #define SUN8I_MIXER_CHAN_UI_LAYER_SIZE(base, layer) \ argument
20 ((base) + 0x20 * (layer) + 0x4)
21 #define SUN8I_MIXER_CHAN_UI_LAYER_COORD(base, layer) \ argument
22 ((base) + 0x20 * (layer) + 0x8)
23 #define SUN8I_MIXER_CHAN_UI_LAYER_PITCH(base, layer) \ argument
24 ((base) + 0x20 * (layer) + 0xc)
25 #define SUN8I_MIXER_CHAN_UI_LAYER_TOP_LADDR(base, layer) \ argument
26 ((base) + 0x20 * (layer) + 0x10)
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Dsun8i_ui_layer.c241 struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); in sun8i_ui_layer_atomic_check() local
256 if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { in sun8i_ui_layer_atomic_check()
269 struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); in sun8i_ui_layer_atomic_disable() local
271 struct sun8i_mixer *mixer = layer->mixer; in sun8i_ui_layer_atomic_disable()
273 sun8i_ui_layer_enable(mixer, layer->channel, layer->overlay, false, 0, in sun8i_ui_layer_atomic_disable()
280 struct sun8i_ui_layer *layer = plane_to_sun8i_ui_layer(plane); in sun8i_ui_layer_atomic_update() local
283 struct sun8i_mixer *mixer = layer->mixer; in sun8i_ui_layer_atomic_update()
286 sun8i_ui_layer_enable(mixer, layer->channel, in sun8i_ui_layer_atomic_update()
287 layer->overlay, false, 0, old_zpos); in sun8i_ui_layer_atomic_update()
291 sun8i_ui_layer_update_coord(mixer, layer->channel, in sun8i_ui_layer_atomic_update()
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Dsun8i_vi_layer.h11 #define SUN8I_MIXER_CHAN_VI_LAYER_ATTR(base, layer) \ argument
12 ((base) + 0x30 * (layer) + 0x0)
13 #define SUN8I_MIXER_CHAN_VI_LAYER_SIZE(base, layer) \ argument
14 ((base) + 0x30 * (layer) + 0x4)
15 #define SUN8I_MIXER_CHAN_VI_LAYER_COORD(base, layer) \ argument
16 ((base) + 0x30 * (layer) + 0x8)
17 #define SUN8I_MIXER_CHAN_VI_LAYER_PITCH(base, layer, plane) \ argument
18 ((base) + 0x30 * (layer) + 0xc + 4 * (plane))
19 #define SUN8I_MIXER_CHAN_VI_LAYER_TOP_LADDR(base, layer, plane) \ argument
20 ((base) + 0x30 * (layer) + 0x18 + 4 * (plane))
Dsun8i_vi_layer.c344 struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); in sun8i_vi_layer_atomic_check() local
359 if (layer->mixer->cfg->scaler_mask & BIT(layer->channel)) { in sun8i_vi_layer_atomic_check()
372 struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); in sun8i_vi_layer_atomic_disable() local
374 struct sun8i_mixer *mixer = layer->mixer; in sun8i_vi_layer_atomic_disable()
376 sun8i_vi_layer_enable(mixer, layer->channel, layer->overlay, false, 0, in sun8i_vi_layer_atomic_disable()
383 struct sun8i_vi_layer *layer = plane_to_sun8i_vi_layer(plane); in sun8i_vi_layer_atomic_update() local
386 struct sun8i_mixer *mixer = layer->mixer; in sun8i_vi_layer_atomic_update()
389 sun8i_vi_layer_enable(mixer, layer->channel, in sun8i_vi_layer_atomic_update()
390 layer->overlay, false, 0, old_zpos); in sun8i_vi_layer_atomic_update()
394 sun8i_vi_layer_update_coord(mixer, layer->channel, in sun8i_vi_layer_atomic_update()
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Dsun8i_csc.c177 static void sun8i_de3_ccsc_set_coefficients(struct regmap *map, int layer, in sun8i_de3_ccsc_set_coefficients() argument
197 base_reg = SUN50I_MIXER_BLEND_CSC_COEFF(DE3_BLD_BASE, layer, 0, 0); in sun8i_de3_ccsc_set_coefficients()
213 static void sun8i_de3_ccsc_enable(struct regmap *map, int layer, bool enable) in sun8i_de3_ccsc_enable() argument
217 mask = SUN50I_MIXER_BLEND_CSC_CTL_EN(layer); in sun8i_de3_ccsc_enable()
228 void sun8i_csc_set_ccsc_coefficients(struct sun8i_mixer *mixer, int layer, in sun8i_csc_set_ccsc_coefficients() argument
236 sun8i_de3_ccsc_set_coefficients(mixer->engine.regs, layer, in sun8i_csc_set_ccsc_coefficients()
241 base = ccsc_base[mixer->cfg->ccsc][layer]; in sun8i_csc_set_ccsc_coefficients()
247 void sun8i_csc_enable_ccsc(struct sun8i_mixer *mixer, int layer, bool enable) in sun8i_csc_enable_ccsc() argument
252 sun8i_de3_ccsc_enable(mixer->engine.regs, layer, enable); in sun8i_csc_enable_ccsc()
256 base = ccsc_base[mixer->cfg->ccsc][layer]; in sun8i_csc_enable_ccsc()
/kernel/linux/linux-5.10/net/caif/
Dcaif_dev.c34 struct cflayer layer; member
160 caifd->layer.up-> in caif_flow_cb()
161 ctrlcmd(caifd->layer.up, in caif_flow_cb()
163 caifd->layer.id); in caif_flow_cb()
167 static int transmit(struct cflayer *layer, struct cfpkt *pkt) in transmit() argument
171 container_of(layer, struct caif_device_entry, layer); in transmit()
229 caifd->layer.up->ctrlcmd(caifd->layer.up, in transmit()
231 caifd->layer.id); in transmit()
258 if (!caifd || !caifd->layer.up || !caifd->layer.up->receive || in receive()
269 err = caifd->layer.up->receive(caifd->layer.up, pkt); in receive()
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Dcfserl.c22 struct cflayer layer; member
34 void cfserl_release(struct cflayer *layer) in cfserl_release() argument
36 kfree(layer); in cfserl_release()
44 caif_assert(offsetof(struct cfserl, layer) == 0); in cfserl_create()
45 this->layer.receive = cfserl_receive; in cfserl_create()
46 this->layer.transmit = cfserl_transmit; in cfserl_create()
47 this->layer.ctrlcmd = cfserl_ctrlcmd; in cfserl_create()
50 snprintf(this->layer.name, CAIF_LAYER_NAME_SZ, "ser1"); in cfserl_create()
51 return &this->layer; in cfserl_create()
158 ret = layr->layer.up->receive(layr->layer.up, pkt); in cfserl_receive()
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Dcaif_usb.c32 struct cflayer layer; member
54 struct cfusbl *usbl = container_of(layr, struct cfusbl, layer); in cfusbl_transmit()
92 caif_assert(offsetof(struct cfusbl, layer) == 0); in cfusbl_create()
94 memset(&this->layer, 0, sizeof(this->layer)); in cfusbl_create()
95 this->layer.receive = cfusbl_receive; in cfusbl_create()
96 this->layer.transmit = cfusbl_transmit; in cfusbl_create()
97 this->layer.ctrlcmd = cfusbl_ctrlcmd; in cfusbl_create()
98 snprintf(this->layer.name, CAIF_LAYER_NAME_SZ, "usb%d", phyid); in cfusbl_create()
99 this->layer.id = phyid; in cfusbl_create()
118 static void cfusbl_release(struct cflayer *layer) in cfusbl_release() argument
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Dcfsrvl.c25 #define container_obj(layr) container_of(layr, struct cfsrvl, layer)
121 info->channel_id = service->layer.id; in cfservl_modemcmd()
142 info->channel_id = service->layer.id; in cfservl_modemcmd()
154 static void cfsrvl_release(struct cflayer *layer) in cfsrvl_release() argument
156 struct cfsrvl *service = container_of(layer, struct cfsrvl, layer); in cfsrvl_release()
165 caif_assert(offsetof(struct cfsrvl, layer) == 0); in cfsrvl_init()
169 service->layer.id = channel_id; in cfsrvl_init()
170 service->layer.ctrlcmd = cfservl_ctrlcmd; in cfsrvl_init()
171 service->layer.modemcmd = cfservl_modemcmd; in cfsrvl_init()
186 u8 cfsrvl_getphyid(struct cflayer *layer) in cfsrvl_getphyid() argument
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Dcfctrl.c17 #define container_obj(layr) container_of(layr, struct cfctrl, serv.layer)
42 caif_assert(offsetof(struct cfctrl, serv.layer) == 0); in cfctrl_create()
48 this->serv.layer.receive = cfctrl_recv; in cfctrl_create()
49 sprintf(this->serv.layer.name, "ctrl"); in cfctrl_create()
50 this->serv.layer.ctrlcmd = cfctrl_ctrlcmd; in cfctrl_create()
57 return &this->serv.layer; in cfctrl_create()
60 void cfctrl_remove(struct cflayer *layer) in cfctrl_remove() argument
63 struct cfctrl *ctrl = container_obj(layer); in cfctrl_remove()
71 kfree(layer); in cfctrl_remove()
163 struct cfctrl_rsp *cfctrl_get_respfuncs(struct cflayer *layer) in cfctrl_get_respfuncs() argument
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Dcfmuxl.c18 #define container_obj(layr) container_of(layr, struct cfmuxl, layer)
25 struct cflayer layer; member
54 this->layer.receive = cfmuxl_receive; in cfmuxl_create()
55 this->layer.transmit = cfmuxl_transmit; in cfmuxl_create()
56 this->layer.ctrlcmd = cfmuxl_ctrlcmd; in cfmuxl_create()
61 snprintf(this->layer.name, CAIF_LAYER_NAME_SZ, "mux"); in cfmuxl_create()
62 return &this->layer; in cfmuxl_create()
250 struct cflayer *layer; in cfmuxl_ctrlcmd() local
253 list_for_each_entry_rcu(layer, &muxl->srvl_list, node) { in cfmuxl_ctrlcmd()
255 if (cfsrvl_phyid_match(layer, phyid) && layer->ctrlcmd) { in cfmuxl_ctrlcmd()
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Dcfrfml.c17 #define container_obj(layr) container_of(layr, struct cfrfml, serv.layer)
34 static void cfrfml_release(struct cflayer *layer) in cfrfml_release() argument
36 struct cfsrvl *srvl = container_of(layer, struct cfsrvl, layer); in cfrfml_release()
37 struct cfrfml *rfml = container_obj(&srvl->layer); in cfrfml_release()
56 this->serv.layer.receive = cfrfml_receive; in cfrfml_create()
57 this->serv.layer.transmit = cfrfml_transmit; in cfrfml_create()
65 snprintf(this->serv.layer.name, CAIF_LAYER_NAME_SZ, in cfrfml_create()
68 return &this->serv.layer; in cfrfml_create()
167 err = rfml->serv.layer.up->receive(rfml->serv.layer.up, pkt); in cfrfml_receive()
201 cfpkt_info(pkt)->channel_id = rfml->serv.layer.id; in cfrfml_transmit_segment()
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Dcffrml.c20 #define container_obj(layr) container_of(layr, struct cffrml, layer)
23 struct cflayer layer; member
46 caif_assert(offsetof(struct cffrml, layer) == 0); in cffrml_create()
48 this->layer.receive = cffrml_receive; in cffrml_create()
49 this->layer.transmit = cffrml_transmit; in cffrml_create()
50 this->layer.ctrlcmd = cffrml_ctrlcmd; in cffrml_create()
51 snprintf(this->layer.name, CAIF_LAYER_NAME_SZ, "frm%d", phyid); in cffrml_create()
53 this->layer.id = phyid; in cffrml_create()
57 void cffrml_free(struct cflayer *layer) in cffrml_free() argument
59 struct cffrml *this = container_obj(layer); in cffrml_free()
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/kernel/linux/linux-5.10/drivers/gpu/drm/xlnx/
Dzynqmp_disp.c447 enum zynqmp_disp_layer_id layer, in zynqmp_disp_avbuf_set_format() argument
454 val &= layer == ZYNQMP_DISP_LAYER_VID in zynqmp_disp_avbuf_set_format()
461 unsigned int reg = layer == ZYNQMP_DISP_LAYER_VID in zynqmp_disp_avbuf_set_format()
583 enum zynqmp_disp_layer_id layer, in zynqmp_disp_avbuf_enable_video() argument
589 if (layer == ZYNQMP_DISP_LAYER_VID) { in zynqmp_disp_avbuf_enable_video()
614 enum zynqmp_disp_layer_id layer) in zynqmp_disp_avbuf_disable_video() argument
619 if (layer == ZYNQMP_DISP_LAYER_VID) { in zynqmp_disp_avbuf_disable_video()
791 struct zynqmp_disp_layer *layer, in zynqmp_disp_blend_layer_set_csc() argument
799 if (layer->disp_fmt->swap) { in zynqmp_disp_blend_layer_set_csc()
800 if (layer->drm_fmt->is_yuv) { in zynqmp_disp_blend_layer_set_csc()
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/kernel/linux/linux-5.10/drivers/gpu/drm/atmel-hlcdc/
Datmel_hlcdc_dc.h276 struct atmel_hlcdc_layer layer; member
286 atmel_hlcdc_layer_to_plane(struct atmel_hlcdc_layer *layer) in atmel_hlcdc_layer_to_plane() argument
288 return container_of(layer, struct atmel_hlcdc_plane, layer); in atmel_hlcdc_layer_to_plane()
358 static inline void atmel_hlcdc_layer_write_reg(struct atmel_hlcdc_layer *layer, in atmel_hlcdc_layer_write_reg() argument
361 regmap_write(layer->regmap, layer->desc->regs_offset + reg, val); in atmel_hlcdc_layer_write_reg()
364 static inline u32 atmel_hlcdc_layer_read_reg(struct atmel_hlcdc_layer *layer, in atmel_hlcdc_layer_read_reg() argument
369 regmap_read(layer->regmap, layer->desc->regs_offset + reg, &val); in atmel_hlcdc_layer_read_reg()
374 static inline void atmel_hlcdc_layer_write_cfg(struct atmel_hlcdc_layer *layer, in atmel_hlcdc_layer_write_cfg() argument
377 atmel_hlcdc_layer_write_reg(layer, in atmel_hlcdc_layer_write_cfg()
378 layer->desc->cfgs_offset + in atmel_hlcdc_layer_write_cfg()
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Datmel_hlcdc_plane.c279 atmel_hlcdc_layer_write_cfg(&plane->layer, cfg_offs + i, in atmel_hlcdc_plane_scaler_set_phicoeff()
286 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_setup_scaler()
293 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_plane_setup_scaler()
325 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.scaler_config, in atmel_hlcdc_plane_setup_scaler()
335 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_update_pos_and_size()
338 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.size, in atmel_hlcdc_plane_update_pos_and_size()
343 atmel_hlcdc_layer_write_cfg(&plane->layer, in atmel_hlcdc_plane_update_pos_and_size()
349 atmel_hlcdc_layer_write_cfg(&plane->layer, desc->layout.pos, in atmel_hlcdc_plane_update_pos_and_size()
361 const struct atmel_hlcdc_layer_desc *desc = plane->layer.desc; in atmel_hlcdc_plane_update_general_settings()
371 atmel_hlcdc_layer_write_cfg(&plane->layer, ATMEL_HLCDC_LAYER_DMA_CFG, in atmel_hlcdc_plane_update_general_settings()
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/kernel/linux/linux-5.10/Documentation/networking/caif/
Dlinux_caif.rst66 CAIF Core layer implements the CAIF protocol as defined by ST-Ericsson.
68 each layer described in the specification is implemented as a separate layer.
78 - Layered architecture (a la Streams), each layer in the CAIF
80 - Clients must call configuration function to add PHY layer.
81 - Clients must implement CAIF layer to consume/produce
84 Client layer.
100 - CFCNFG CAIF Configuration layer. Configures the CAIF Protocol
104 - CFCTRL CAIF Control layer. Encodes and Decodes control messages
111 - CFVEI CAIF VEI layer. Handles CAIF AT Channels on VEI (Virtual
112 External Interface). This layer encodes/decodes VEI frames.
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/kernel/linux/linux-5.10/drivers/gpu/drm/zte/
Dzx_plane.c103 void __iomem *layer = zplane->layer; in zx_vl_set_update() local
105 zx_writel_mask(layer + VL_CTRL0, VL_UPDATE, VL_UPDATE); in zx_vl_set_update()
190 void __iomem *layer = zplane->layer; in zx_vl_plane_atomic_update() local
216 paddr_reg = layer + VL_Y; in zx_vl_plane_atomic_update()
227 zx_writel(layer + VL_SRC_SIZE, GL_SRC_W(src_w) | GL_SRC_H(src_h)); in zx_vl_plane_atomic_update()
230 zx_writel(layer + VL_POS_START, GL_POS_X(dst_x) | GL_POS_Y(dst_y)); in zx_vl_plane_atomic_update()
233 zx_writel(layer + VL_POS_END, in zx_vl_plane_atomic_update()
237 zx_writel(layer + VL_STRIDE, LUMA_STRIDE(fb->pitches[0]) | in zx_vl_plane_atomic_update()
243 zx_writel(layer + VL_CTRL1, fmt); in zx_vl_plane_atomic_update()
246 zx_writel_mask(layer + VL_CTRL2, VL_SCALER_BYPASS_MODE, in zx_vl_plane_atomic_update()
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/kernel/linux/linux-5.10/fs/overlayfs/
Dexport.c94 return oe->lowerstack[0].layer->idx; in ovl_connectable_layer()
115 origin_layer = OVL_E(dentry)->lowerstack[0].layer->idx; in ovl_connect_layer()
321 oe->lowerstack->layer = lowerpath->layer; in ovl_obtain_alias()
350 if (oe->lowerstack[i].layer->idx == idx) in ovl_dentry_real_at()
365 const struct ovl_layer *layer) in ovl_lookup_real_one() argument
382 if (ovl_dentry_real_at(connected, layer->idx) != parent) in ovl_lookup_real_one()
401 } else if (ovl_dentry_real_at(this, layer->idx) != real) { in ovl_lookup_real_one()
414 real, layer->idx, connected, err); in ovl_lookup_real_one()
421 const struct ovl_layer *layer);
428 const struct ovl_layer *layer) in ovl_lookup_real_inode() argument
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/kernel/linux/linux-5.10/drivers/gpu/drm/arm/
Dmalidp_planes.c299 mc->scaled_planes_mask &= ~(mp->layer->id); in malidp_se_check_scaling()
303 if (mp->layer->id & (DE_SMART | DE_GRAPHICS2)) in malidp_se_check_scaling()
306 mc->scaled_planes_mask |= mp->layer->id; in malidp_se_check_scaling()
495 if (!mp->layer->mmu_ctrl_offset) in malidp_de_prefetch_settings()
521 mp->layer->id, fb->format->format, in malidp_de_plane_check()
571 if (mp->layer->rot == ROTATE_NONE) in malidp_de_plane_check()
573 if ((mp->layer->rot == ROTATE_COMPRESSED) && !(fb->modifier)) in malidp_de_plane_check()
585 if (mp->layer->id == DE_SMART && fb->modifier) { in malidp_de_plane_check()
621 if (!mp->layer->stride_offset) in malidp_de_set_plane_pitches()
637 mp->layer->base + in malidp_de_set_plane_pitches()
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/kernel/linux/linux-5.10/drivers/gpu/drm/arm/display/komeda/
Dkomeda_plane.c23 struct komeda_pipeline *pipe = kplane->layer->base.pipeline; in komeda_plane_init_data_flow()
59 komeda_complete_data_flow_cfg(kplane->layer, dflow, fb); in komeda_plane_init_data_flow()
78 struct komeda_layer *layer = kplane->layer; in komeda_plane_atomic_check() local
104 err = komeda_build_layer_split_data_flow(layer, in komeda_plane_atomic_check()
107 err = komeda_build_layer_data_flow(layer, in komeda_plane_atomic_check()
150 state->base.zpos = kplane->layer->base.id; in komeda_plane_reset()
189 u32 layer_type = kplane->layer->layer_type; in komeda_plane_format_mod_supported()
249 struct komeda_layer *layer) in komeda_plane_add() argument
252 struct komeda_component *c = &layer->base; in komeda_plane_add()
263 kplane->layer = layer; in komeda_plane_add()
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