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Searched refs:max_clk (Results 1 – 24 of 24) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp5/
Dmdp5_cfg.c98 .max_clk = 200000000,
180 .max_clk = 200000000,
275 .max_clk = 320000000,
342 .max_clk = 320000000,
417 .max_clk = 366670000,
512 .max_clk = 400000000,
620 .max_clk = 412500000,
717 .max_clk = 360000000,
802 .max_clk = 320000000,
910 .max_clk = 412500000,
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Dmdp5_cfg.h97 uint32_t max_clk; member
Dmdp5_kms.c898 clk_set_rate(mdp5_kms->core_clk, config->hw->max_clk); in mdp5_init()
/kernel/linux/linux-5.10/drivers/mmc/host/
Dsdhci-of-esdhc.c36 const unsigned int max_clk[MMC_TIMING_NUM]; member
41 .max_clk[MMC_TIMING_MMC_HS] = 46500000,
42 .max_clk[MMC_TIMING_SD_HS] = 46500000,
47 .max_clk[MMC_TIMING_UHS_SDR104] = 167000000,
48 .max_clk[MMC_TIMING_MMC_HS200] = 167000000,
53 .max_clk[MMC_TIMING_UHS_SDR104] = 125000000,
54 .max_clk[MMC_TIMING_MMC_HS200] = 125000000,
59 .max_clk[MMC_TIMING_LEGACY] = 20000000,
60 .max_clk[MMC_TIMING_MMC_HS] = 42000000,
61 .max_clk[MMC_TIMING_SD_HS] = 40000000,
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Dsdhci-cns3xxx.c37 while (host->max_clk / div > clock) { in sdhci_cns3xxx_set_clock()
51 clock, host->max_clk / div); in sdhci_cns3xxx_set_clock()
Dbcm2835.c154 unsigned int max_clk; /* Max possible freq */ member
1135 div = host->max_clk / clock; in bcm2835_set_clock()
1138 if ((host->max_clk / div) > clock) in bcm2835_set_clock()
1145 clock = host->max_clk / (div + 2); in bcm2835_set_clock()
1272 if (!mmc->f_max || mmc->f_max > host->max_clk) in bcm2835_add_host()
1273 mmc->f_max = host->max_clk; in bcm2835_add_host()
1274 mmc->f_min = host->max_clk / SDCDIV_MAX_CDIV; in bcm2835_add_host()
1413 host->max_clk = clk_get_rate(clk); in bcm2835_probe()
Dsdhci-of-aspeed.c68 if (WARN_ON(clock > host->max_clk)) in aspeed_sdhci_set_clock()
69 clock = host->max_clk; in aspeed_sdhci_set_clock()
Dsdhci.c1894 if ((host->max_clk * host->clk_mul / div) in sdhci_calc_clk()
1898 if ((host->max_clk * host->clk_mul / div) <= clock) { in sdhci_calc_clk()
1918 if (host->max_clk <= clock) in sdhci_calc_clk()
1923 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1930 && !div && host->max_clk <= 25000000) in sdhci_calc_clk()
1936 if ((host->max_clk / div) <= clock) in sdhci_calc_clk()
1945 *actual_clock = (host->max_clk * clk_mul) / real_div; in sdhci_calc_clk()
4134 u32 max_clk; in sdhci_setup_host() local
4287 host->max_clk = FIELD_GET(SDHCI_CLOCK_V3_BASE_MASK, host->caps); in sdhci_setup_host()
4289 host->max_clk = FIELD_GET(SDHCI_CLOCK_BASE_MASK, host->caps); in sdhci_setup_host()
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Dsdhci-cadence.c183 return host->max_clk; in sdhci_cdns_get_timeout_clock()
Dsdhci.h517 unsigned int max_clk; /* Max possible freq (MHz) */ member
Dsdhci-s3c.c264 host->max_clk = ourhost->clk_rates[best_src]; in sdhci_s3c_set_clock()
Dsdhci-tegra.c765 host->max_clk = host_clk; in tegra_sdhci_set_clock()
767 host->max_clk = clk_get_rate(pltfm_host->clk); in tegra_sdhci_set_clock()
Dsdhci-of-arasan.c275 sdhci_set_clock(host, host->max_clk); in sdhci_arasan_set_clock()
/kernel/linux/linux-5.10/drivers/misc/habanalabs/gaudi/
Dgaudi_hwmgr.c19 int gaudi_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk) in gaudi_get_clk_rate() argument
34 *max_clk = (value / 1000 / 1000); in gaudi_get_clk_rate()
DgaudiP.h273 int gaudi_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);
/kernel/linux/linux-5.10/arch/x86/include/asm/
Dintel-mid.h59 u32 max_clk; member
/kernel/linux/linux-5.10/drivers/misc/habanalabs/goya/
Dgoya_hwmgr.c35 int goya_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk) in goya_get_clk_rate() argument
50 *max_clk = (value / 1000 / 1000); in goya_get_clk_rate()
DgoyaP.h234 int goya_get_clk_rate(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);
/kernel/linux/linux-5.10/drivers/gpu/drm/msm/disp/mdp4/
Dmdp4_kms.c470 clk_set_rate(mdp4_kms->clk, config->max_clk); in mdp4_kms_init()
490 clk_set_rate(mdp4_kms->lut_clk, config->max_clk); in mdp4_kms_init()
567 config.max_clk = 266667000; in mdp4_get_config()
Dmdp4_kms.h48 uint32_t max_clk; member
/kernel/linux/linux-5.10/arch/x86/platform/intel-mid/
Dsfi.c428 sd_info.max_clk = pentry->max_freq; in sfi_handle_sd_dev()
433 sd_info.max_clk, in sfi_handle_sd_dev()
/kernel/linux/linux-5.10/drivers/gpu/drm/bridge/
Dsil-sii8620.c1176 int max_clk; in sii8620_start_video() member
1193 if (clk < clk_spec[i].max_clk) in sii8620_start_video()
1196 if (100 * clk >= 98 * clk_spec[i].max_clk) in sii8620_start_video()
/kernel/linux/linux-5.10/drivers/misc/habanalabs/common/
Dhabanalabs.h805 int (*get_clk_rate)(struct hl_device *hdev, u32 *cur_clk, u32 *max_clk);
/kernel/linux/patches/linux-5.10/imx8mm_patch/patches/drivers/
D0030_linux_drivers_pci_misc_nvmem_of_mtd_mmc.patch11527 sdhci_set_clock(host, host->max_clk);
12932 - clock_fixup = esdhc->clk_fixup->max_clk[host->mmc->ios.timing];
12933 + fixup = esdhc->clk_fixup->max_clk[host->mmc->ios.timing];
12941 - while (host->max_clk / pre_div / 16 > clock_fixup && pre_div < 256)
12947 + while (host->max_clk / pre_div / 16 > clock && pre_div < 256)
12950 - while (host->max_clk / pre_div / div > clock_fixup && div < 16)
12951 + while (host->max_clk / pre_div / div > clock && div < 16)
12981 - host->mmc->actual_clock = host->max_clk / esdhc->div_ratio;
12987 + clock, host->max_clk / pre_div / div);
12988 + host->mmc->actual_clock = host->max_clk / pre_div / div;
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