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Searched refs:min_clock_in_sr (Results 1 – 13 of 13) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_hwmgr.h157 uint32_t min_clock_in_sr; member
Dvega10_hwmgr.h168 uint32_t min_clock_in_sr; member
Dvega12_hwmgr.h147 uint32_t min_clock_in_sr; member
Dvega20_hwmgr.h200 uint32_t min_clock_in_sr; member
Dsmu7_hwmgr.c3718 if (data->display_timing.min_clock_in_sr != min_clocks.engineClockInSR && in smu7_find_dpm_states_clocks_in_dpm_table()
3720 data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK)) in smu7_find_dpm_states_clocks_in_dpm_table()
4288 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr && in smu7_check_smc_update_required_for_display_configuration()
4289 (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK || in smu7_check_smc_update_required_for_display_configuration()
Dvega12_hwmgr.c2600 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega12_check_smc_update_required_for_display_configuration()
Dvega20_hwmgr.c3913 (data->display_timing.min_clock_in_sr != in vega20_check_smc_update_required_for_display_configuration()
Dvega10_hwmgr.c4860 if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr) in vega10_check_smc_update_required_for_display_configuration()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Diceland_smumgr.c931 data->display_timing.min_clock_in_sr = in iceland_populate_single_graphic_level()
938 data->display_timing.min_clock_in_sr); in iceland_populate_single_graphic_level()
Dtonga_smumgr.c658 data->display_timing.min_clock_in_sr = in tonga_populate_single_graphic_level()
665 data->display_timing.min_clock_in_sr); in tonga_populate_single_graphic_level()
Dvegam_smumgr.c840 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in vegam_populate_single_graphic_level()
Dfiji_smumgr.c975 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in fiji_populate_single_graphic_level()
Dpolaris10_smumgr.c945 data->display_timing.min_clock_in_sr = hwmgr->display_config->min_core_set_clock_in_sr; in polaris10_populate_single_graphic_level()