/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn10/ |
D | dcn10_mpc.c | 42 int mpcc_id) in mpc1_set_bg_color() argument 45 struct mpcc *bottommost_mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_set_bg_color() 61 REG_SET(MPCC_BG_R_CR[bottommost_mpcc->mpcc_id], 0, in mpc1_set_bg_color() 63 REG_SET(MPCC_BG_G_Y[bottommost_mpcc->mpcc_id], 0, in mpc1_set_bg_color() 65 REG_SET(MPCC_BG_B_CB[bottommost_mpcc->mpcc_id], 0, in mpc1_set_bg_color() 72 int mpcc_id) in mpc1_update_blending() argument 75 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc1_update_blending() 77 REG_UPDATE_5(MPCC_CONTROL[mpcc_id], in mpc1_update_blending() 84 mpc1_set_bg_color(mpc, &blnd_cfg->black_color, mpcc_id); in mpc1_update_blending() 91 int mpcc_id) in mpc1_update_stereo_mix() argument [all …]
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D | dcn10_mpc.h | 148 int mpcc_id); 160 unsigned int mpcc_id); 174 int mpcc_id); 178 int mpcc_id); 182 int mpcc_id); 190 int mpcc_id);
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D | dcn10_hw_sequencer.c | 1238 hubp->mpcc_id = dpp->inst; in dcn10_init_pipes() 2373 int mpcc_id; in dcn10_update_mpcc() local 2419 mpcc_id = hubp->inst; in dcn10_update_mpcc() 2423 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn10_update_mpcc() 2428 new_mpcc = mpc->funcs->get_mpcc_for_dpp(mpc_tree_params, mpcc_id); in dcn10_update_mpcc() 2435 dc->res_pool->mpc, mpcc_id); in dcn10_update_mpcc() 2444 mpcc_id); in dcn10_update_mpcc() 2449 hubp->mpcc_id = mpcc_id; in dcn10_update_mpcc()
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D | dcn10_hubp.c | 65 hubp->mpcc_id = 0xf; in hubp1_set_blank() 1298 hubp1->base.mpcc_id = 0xf; in dcn10_hubp_construct()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/ |
D | dcn20_mpc.c | 51 int mpcc_id) in mpc2_update_blending() argument 55 struct mpcc *mpcc = mpc1_get_mpcc(mpc, mpcc_id); in mpc2_update_blending() 57 REG_UPDATE_7(MPCC_CONTROL[mpcc_id], in mpc2_update_blending() 66 REG_SET(MPCC_TOP_GAIN[mpcc_id], 0, MPCC_TOP_GAIN, blnd_cfg->top_gain); in mpc2_update_blending() 67 REG_SET(MPCC_BOT_GAIN_INSIDE[mpcc_id], 0, MPCC_BOT_GAIN_INSIDE, blnd_cfg->bottom_inside_gain); in mpc2_update_blending() 68 REG_SET(MPCC_BOT_GAIN_OUTSIDE[mpcc_id], 0, MPCC_BOT_GAIN_OUTSIDE, blnd_cfg->bottom_outside_gain); in mpc2_update_blending() 70 mpc1_set_bg_color(mpc, &blnd_cfg->black_color, mpcc_id); in mpc2_update_blending() 274 struct mpc *mpc, int mpcc_id, in mpc20_power_on_ogam_lut() argument 279 REG_SET(MPCC_MEM_PWR_CTRL[mpcc_id], 0, in mpc20_power_on_ogam_lut() 285 struct mpc *mpc, int mpcc_id, in mpc20_configure_ogam_lut() argument [all …]
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D | dcn20_mpc.h | 280 int mpcc_id); 306 int mpcc_id, 310 void mpc2_assert_mpcc_idle_before_connect(struct mpc *mpc, int mpcc_id); 311 void mpc20_power_on_ogam_lut(struct mpc *mpc, int mpcc_id, bool power_on);
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D | dcn20_hwseq.c | 779 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn20_program_output_csc() local 782 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true); in dcn20_program_output_csc() 802 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn20_set_output_transfer_func() local 813 mpc->funcs->power_on_mpc_mem_pwr(mpc, mpcc_id, true); in dcn20_set_output_transfer_func() 833 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn20_set_output_transfer_func() 1491 int mpcc_id = hubp->inst; in dcn20_update_dchubp_dpp() local 1515 mpc->funcs->set_gamut_remap(mpc, mpcc_id, &adjust); in dcn20_update_dchubp_dpp() 2256 int mpcc_id; in dcn20_update_mpcc() local 2306 mpcc_id = hubp->inst; in dcn20_update_mpcc() 2311 mpc->funcs->update_blending(mpc, &blnd_cfg, mpcc_id); in dcn20_update_mpcc() [all …]
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D | dcn20_hubp.c | 959 hubp->mpcc_id = 0xf; in hubp2_set_blank() 1625 hubp2->base.mpcc_id = 0xf; in hubp2_construct()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/ |
D | dcn30_mpc.c | 65 int mpcc_id) in mpc3_set_dwb_mux() argument 70 MPC_DWB0_MUX, mpcc_id); in mpc3_set_dwb_mux() 102 static enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc, int mpcc_id) in mpc3_get_ogam_current() argument 112 REG_GET_2(MPCC_OGAM_CONTROL[mpcc_id], in mpc3_get_ogam_current() 141 struct mpc *mpc, int mpcc_id, in mpc3_power_on_ogam_lut() argument 146 REG_SET(MPCC_MEM_PWR_CTRL[mpcc_id], 0, in mpc3_power_on_ogam_lut() 151 struct mpc *mpc, int mpcc_id, in mpc3_configure_ogam_lut() argument 156 REG_UPDATE_2(MPCC_OGAM_LUT_CONTROL[mpcc_id], in mpc3_configure_ogam_lut() 160 REG_SET(MPCC_OGAM_LUT_INDEX[mpcc_id], 0, MPCC_OGAM_LUT_INDEX, 0); in mpc3_configure_ogam_lut() 197 static void mpc3_program_luta(struct mpc *mpc, int mpcc_id, in mpc3_program_luta() argument [all …]
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D | dcn30_hwseq.c | 94 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn30_set_mpc_shaper_3dlut() local 122 if (mpcc_id_projected != mpcc_id) in dcn30_set_mpc_shaper_3dlut() 125 acquired_rmu = mpc->funcs->acquire_rmu(mpc, mpcc_id, in dcn30_set_mpc_shaper_3dlut() 136 mpc->funcs->release_rmu(mpc, mpcc_id); in dcn30_set_mpc_shaper_3dlut() 189 int mpcc_id = pipe_ctx->plane_res.hubp->inst; in dcn30_set_output_transfer_func() local 213 mpc->funcs->set_output_gamma(mpc, mpcc_id, params); in dcn30_set_output_transfer_func()
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D | dcn30_resource.h | 73 int mpcc_id,
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D | dcn30_mpc.h | 622 int mpcc_id, int rmu_idx); 648 int mpcc_id, 657 int mpcc_id,
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D | dcn30_hubp.c | 529 hubp2->base.mpcc_id = 0xf; in hubp3_construct()
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D | dcn30_resource.c | 1643 int mpcc_id, in dcn30_acquire_post_bldn_3dlut() argument 1664 state->bits.mpc_rmu0_mux = mpcc_id; in dcn30_acquire_post_bldn_3dlut() 1666 state->bits.mpc_rmu1_mux = mpcc_id; in dcn30_acquire_post_bldn_3dlut() 1668 state->bits.mpc_rmu2_mux = mpcc_id; in dcn30_acquire_post_bldn_3dlut()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/ |
D | mpc.h | 121 int mpcc_id; /* MPCC physical instance */ member 189 int mpcc_id); 217 unsigned int mpcc_id); 232 int mpcc_id); 274 int mpcc_id); 300 void (*assert_mpcc_idle_before_connect)(struct mpc *mpc, int mpcc_id); 327 int mpcc_id, 331 int mpcc_id, 337 int mpcc_id); 358 int mpcc_id, [all …]
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D | hubp.h | 65 int mpcc_id; member
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/ |
D | core_types.h | 158 int mpcc_id,
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/core/ |
D | dc.c | 1488 int mpcc_id = 0; in dc_acquire_release_mpc_3dlut() local 1496 mpcc_id = res_ctx->pipe_ctx[pipe_idx].plane_res.hubp->inst; in dc_acquire_release_mpc_3dlut() 1505 ret = pool->funcs->acquire_post_bldn_3dlut(res_ctx, pool, mpcc_id, lut, shaper); in dc_acquire_release_mpc_3dlut()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/ |
D | dcn21_hubp.c | 858 hubp21->base.mpcc_id = 0xf; in hubp21_construct()
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