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Searched refs:mtt_base (Results 1 – 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/infiniband/hw/mthca/
Dmthca_mr.c268 mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base + in __mthca_write_mtt()
322 mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * dev->limits.mtt_seg_size + in mthca_tavor_write_mtt_seg()
477 cpu_to_be64(dev->mr_table.mtt_base + in mthca_mr_alloc()
594 dev->mr_table.tavor_fmr.mtt_base = NULL; in mthca_init_mr_table()
628 dev->mr_table.mtt_base); in mthca_init_mr_table()
630 dev->mr_table.tavor_fmr.mtt_base = in mthca_init_mr_table()
632 if (!dev->mr_table.tavor_fmr.mtt_base) { in mthca_init_mr_table()
675 if (dev->mr_table.tavor_fmr.mtt_base) in mthca_init_mr_table()
676 iounmap(dev->mr_table.tavor_fmr.mtt_base); in mthca_init_mr_table()
699 if (dev->mr_table.tavor_fmr.mtt_base) in mthca_cleanup_mr_table()
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Dmthca_profile.c229 dev->mr_table.mtt_base = profile[i].start; in mthca_make_profile()
230 init_hca->mtt_base = profile[i].start; in mthca_make_profile()
Dmthca_dev.h214 u64 mtt_base; member
220 void __iomem *mtt_base; member
Dmthca_cmd.h206 u64 mtt_base; member
Dmthca_main.c421 mdev->mr_table.mtt_table = mthca_alloc_icm_table(mdev, init_hca->mtt_base, in mthca_init_icm()
Dmthca_cmd.c1413 MTHCA_PUT(inbox, param->mtt_base, INIT_HCA_MTT_BASE_OFFSET); in mthca_INIT_HCA()
/kernel/linux/linux-5.10/drivers/net/ethernet/mellanox/mlx4/
Dprofile.c239 priv->mr_table.mtt_base = profile[i].start; in mlx4_make_profile()
240 init_hca->mtt_base = profile[i].start; in mlx4_make_profile()
Dresource_tracker.c2764 int mtt_base = mr_get_mtt_addr(inbox->buf) / dev->caps.mtt_entry_sz; in mlx4_SW2HW_MPT_wrapper() local
2804 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); in mlx4_SW2HW_MPT_wrapper()
2808 err = check_mtt_range(dev, slave, mtt_base, in mlx4_SW2HW_MPT_wrapper()
2962 int mtt_base = qp_get_mtt_addr(qpc) / dev->caps.mtt_entry_sz; in mlx4_RST2INIT_QP_wrapper() local
2990 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); in mlx4_RST2INIT_QP_wrapper()
2994 err = check_mtt_range(dev, slave, mtt_base, mtt_size, mtt); in mlx4_RST2INIT_QP_wrapper()
3039 put_res(dev, slave, mtt_base, RES_MTT); in mlx4_RST2INIT_QP_wrapper()
3053 put_res(dev, slave, mtt_base, RES_MTT); in mlx4_RST2INIT_QP_wrapper()
3102 int mtt_base = eq_get_mtt_addr(eqc) / dev->caps.mtt_entry_sz; in mlx4_SW2HW_EQ_wrapper() local
3114 err = get_res(dev, slave, mtt_base, RES_MTT, &mtt); in mlx4_SW2HW_EQ_wrapper()
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Dfw.h184 u64 mtt_base; member
Dmlx4.h673 u64 mtt_base; member
Dfw.c2044 MLX4_PUT(inbox, param->mtt_base, INIT_HCA_MTT_BASE_OFFSET); in mlx4_INIT_HCA()
2191 MLX4_GET(param->mtt_base, outbox, INIT_HCA_MTT_BASE_OFFSET); in mlx4_QUERY_HCA()
Dmain.c1701 init_hca->mtt_base, in mlx4_init_icm()