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Searched refs:phyclk_mhz (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/amdgpu/
Damdgpu_socbb.h34 uint32_t phyclk_mhz; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c172 .phyclk_mhz = 600.0,
183 .phyclk_mhz = 600.0,
194 .phyclk_mhz = 600.0,
205 .phyclk_mhz = 600.0,
216 .phyclk_mhz = 810.0,
227 .phyclk_mhz = 810.0,
238 .phyclk_mhz = 810.0,
249 .phyclk_mhz = 1325.0,
261 .phyclk_mhz = 1325.0,
1438 clock_limits[i].phyclk_mhz = dcn2_1_soc.clock_limits[closest_clk_lvl].phyclk_mhz; in update_bw_bounding_box()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c237 .phyclk_mhz = 540.0,
248 .phyclk_mhz = 600.0,
259 .phyclk_mhz = 810.0,
270 .phyclk_mhz = 810.0,
281 .phyclk_mhz = 810.0,
293 .phyclk_mhz = 810.0,
348 .phyclk_mhz = 540.0,
359 .phyclk_mhz = 600.0,
370 .phyclk_mhz = 810.0,
381 .phyclk_mhz = 810.0,
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/inc/hw/
Dclk_mgr.h81 unsigned int phyclk_mhz; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn30/
Ddcn30_clk_mgr.c197 &clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz, in dcn3_init_clocks()
456 unsigned int i, max_phyclk_req = clk_mgr_base->bw_params->clk_table.entries[0].phyclk_mhz * 1000; in dcn30_notify_link_rate_change()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_structs.h67 double phyclk_mhz; member
Ddisplay_mode_vba.c267 mode_lib->vba.PHYCLKPerState[i] = soc->clock_limits[i].phyclk_mhz; in fetch_socbb_params()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c176 .phyclk_mhz = 300.0,
1816 dcn3_0_soc.clock_limits[i].phyclk_mhz = in init_soc_bounding_box()
1817 fixed16_to_double_to_cpu(bb->clock_limits[i].phyclk_mhz); in init_soc_bounding_box()
2467 if (bw_params->clk_table.entries[i].phyclk_mhz > max_phyclk_mhz) in dcn30_update_bw_bounding_box()
2468 max_phyclk_mhz = bw_params->clk_table.entries[i].phyclk_mhz; in dcn30_update_bw_bounding_box()
2478 max_phyclk_mhz = dcn3_0_soc.clock_limits[0].phyclk_mhz; in dcn30_update_bw_bounding_box()
2556 dcn3_0_soc.clock_limits[i].phyclk_mhz = max_phyclk_mhz; in dcn30_update_bw_bounding_box()