| /kernel/linux/linux-5.10/drivers/gpu/drm/i915/display/ |
| D | intel_ddi.c | 1340 int clock = crtc_state->port_clock; in icl_pll_to_ddi_clk_sel()
1547 dotclock = intel_dotclock_calculate(pipe_config->port_clock, in ddi_dotclock_get()
1550 dotclock = intel_dotclock_calculate(pipe_config->port_clock, in ddi_dotclock_get()
1553 dotclock = pipe_config->port_clock * 24 / pipe_config->pipe_bpp; in ddi_dotclock_get()
1555 dotclock = pipe_config->port_clock; in ddi_dotclock_get()
1576 pipe_config->port_clock = icl_calc_tbt_pll_link(dev_priv, in intel_ddi_clock_get()
1579 pipe_config->port_clock = in intel_ddi_clock_get()
3312 intel_dp_set_link_params(intel_dp, crtc_state->port_clock, in tgl_ddi_pre_enable_dp()
3385 tgl_ddi_vswing_sequence(encoder, crtc_state->port_clock, level, in tgl_ddi_pre_enable_dp()
3452 intel_dp_set_link_params(intel_dp, crtc_state->port_clock, in hsw_ddi_pre_enable_dp()
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| D | intel_audio.c | 131 crtc_state->port_clock == dp_aud_n_m[i].clock) in audio_config_dp_get_n_m()
288 crtc_state->port_clock == hdmi_ncts_table[i].clock) { in audio_config_hdmi_get_n()
535 link_clk = crtc_state->port_clock; in calc_hblank_early_prog()
573 link_clk = crtc_state->port_clock; in calc_samples_room()
879 crtc_state->port_clock, in intel_audio_codec_enable()
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| D | intel_dp.h | 100 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock,
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| D | intel_dpio_phy.c | 906 if (crtc_state->port_clock > 270000) in chv_phy_pre_encoder_enable()
908 else if (crtc_state->port_clock > 135000) in chv_phy_pre_encoder_enable()
910 else if (crtc_state->port_clock > 67500) in chv_phy_pre_encoder_enable()
912 else if (crtc_state->port_clock > 33750) in chv_phy_pre_encoder_enable()
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| D | intel_dpll_mgr.c | 874 hsw_ddi_calculate_wrpll(crtc_state->port_clock * 1000, &r2, &n2, &p); in hsw_ddi_wrpll_get_dpll()
938 int clock = crtc_state->port_clock; in hsw_ddi_lcpll_get_dpll()
994 if (drm_WARN_ON(crtc->base.dev, crtc_state->port_clock / 2 != 135000)) in hsw_ddi_spll_get_dpll()
1555 if (!skl_ddi_calculate_wrpll(crtc_state->port_clock * 1000, in skl_ddi_hdmi_pll_dividers()
1647 switch (crtc_state->port_clock / 2) { in skl_ddi_dp_set_dpll_hw_state()
2082 crtc_state->port_clock, in bxt_ddi_hdmi_pll_dividers()
2103 int clock = crtc_state->port_clock; in bxt_ddi_dp_pll_dividers()
2122 int clock = crtc_state->port_clock; in bxt_ddi_set_dpll_hw_state()
2550 u32 afe_clock = crtc_state->port_clock * 5; in __cnl_ddi_calculate_wrpll()
2710 switch (crtc_state->port_clock / 2) { in cnl_ddi_dp_set_dpll_hw_state()
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| D | intel_dp_mst.c | 60 crtc_state->port_clock = limits->max_clock; in intel_dp_mst_compute_link_config()
72 drm_dp_get_vc_payload_bw(crtc_state->port_clock, in intel_dp_mst_compute_link_config()
89 crtc_state->port_clock, in intel_dp_mst_compute_link_config()
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| D | intel_dp.c | 1871 if (pipe_config->port_clock == divisor[i].clock) { in intel_dp_set_clock()
1942 void intel_dp_compute_rate(struct intel_dp *intel_dp, int port_clock, in intel_dp_compute_rate() argument
1949 intel_dp_rate_select(intel_dp, port_clock); in intel_dp_compute_rate()
1951 *link_bw = drm_dp_link_rate_to_bw_code(port_clock); in intel_dp_compute_rate()
2148 pipe_config->port_clock = link_clock; in intel_dp_compute_link_config_wide()
2274 pipe_config->port_clock = intel_dp->common_rates[limits->max_clock]; in intel_dp_dsc_compute_config()
2290 pipe_config->port_clock, in intel_dp_dsc_compute_config()
2417 pipe_config->lane_count, pipe_config->port_clock, in intel_dp_compute_link_config()
2425 intel_dp_max_data_rate(pipe_config->port_clock, in intel_dp_compute_link_config()
2429 pipe_config->lane_count, pipe_config->port_clock, in intel_dp_compute_link_config()
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| D | intel_lspcon.c | 196 crtc_state->port_clock /= 2; in lspcon_ycbcr420_config()
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| D | intel_crt.c | 136 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_crt_get_config()
442 pipe_config->port_clock = 135000 * 2; in hsw_crt_compute_config()
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| D | intel_hdmi.c | 1891 dotclock = pipe_config->port_clock * 2 / 3; in intel_hdmi_get_config()
1893 dotclock = pipe_config->port_clock; in intel_hdmi_get_config()
2429 crtc_state->port_clock = intel_hdmi_port_clock(clock, bpc); in intel_hdmi_compute_clock()
2443 if (hdmi_port_clock_valid(intel_hdmi, crtc_state->port_clock, in intel_hdmi_compute_clock()
2447 crtc_state->port_clock); in intel_hdmi_compute_clock()
2551 if (pipe_config->port_clock > 340000) { in intel_hdmi_compute_config()
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| D | intel_dvo.c | 183 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_dvo_get_config()
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| D | intel_display.c | 249 return pipe_config->port_clock; /* SPLL */ in intel_fdi_link_freq()
1041 crtc_state->port_clock, refclk, in bxt_find_best_dpll()
8487 if (pipe_config->port_clock == 162000 || in vlv_prepare_pll()
9063 !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock, in i8xx_crtc_compute_clock()
9108 !g4x_find_best_dpll(limit, crtc_state, crtc_state->port_clock, in g4x_crtc_compute_clock()
9145 !pnv_find_best_dpll(limit, crtc_state, crtc_state->port_clock, in pnv_crtc_compute_clock()
9182 !i9xx_find_best_dpll(limit, crtc_state, crtc_state->port_clock, in i9xx_crtc_compute_clock()
9205 !chv_find_best_dpll(limit, crtc_state, crtc_state->port_clock, in chv_crtc_compute_clock()
9227 !vlv_find_best_dpll(limit, crtc_state, crtc_state->port_clock, in vlv_crtc_compute_clock()
9298 pipe_config->port_clock = vlv_calc_dpll_params(refclk, &clock); in vlv_crtc_clock_get()
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| D | intel_cdclk.c | 2025 crtc_state->port_clock >= 540000 && in intel_crtc_compute_min_cdclk()
2052 min_cdclk = max(crtc_state->port_clock, min_cdclk); in intel_crtc_compute_min_cdclk()
2279 switch (crtc_state->port_clock / 2) { in skl_dpll0_vco()
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| D | intel_tv.c | 1118 tv_mode.clock = pipe_config->port_clock; in intel_tv_get_config()
1206 pipe_config->port_clock = tv_mode->clock; in intel_tv_compute_config()
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| D | intel_lvds.c | 150 pipe_config->hw.adjusted_mode.crtc_clock = pipe_config->port_clock; in intel_lvds_get_config()
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| D | intel_display_types.h | 939 int port_clock; member
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| D | icl_dsi.c | 1460 pipe_config->port_clock = intel_dpll_get_freq(i915, in gen11_dsi_get_config()
1558 pipe_config->port_clock = afe_clk(encoder, pipe_config) / 5; in gen11_dsi_compute_config()
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| D | intel_sdvo.c | 1255 unsigned dotclock = pipe_config->port_clock; in i9xx_adjust_sdvo_tv_clock()
1676 dotclock = pipe_config->port_clock; in intel_sdvo_get_config()
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| D | vlv_dsi.c | 1255 pipe_config->port_clock = pclk; in intel_dsi_get_config()
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