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Searched refs:post_div_val (Results 1 – 12 of 12) sorted by relevance

/kernel/linux/linux-5.10/drivers/clk/qcom/
Dclk-pll.h69 u32 post_div_val; member
Dclk-alpha-pll.h120 u32 post_div_val; member
Dclk-cpu-8996.c109 .post_div_val = 0x1 << 8,
151 .post_div_val = 0x1 << 8,
Dlcc-ipq806x.c50 .post_div_val = 0x0,
Dclk-pll.c230 val |= config->post_div_val; in clk_pll_configure()
Dclk-alpha-pll.c231 val |= config->post_div_val; in clk_alpha_pll_configure()
1038 val = config->post_div_val; in clk_fabia_pll_configure()
Dmmcc-msm8974.c2303 .post_div_val = 0x0,
2317 .post_div_val = 0x0,
Dmmcc-apq8084.c3036 .post_div_val = 0x0,
3050 .post_div_val = 0x0,
Dgcc-msm8939.c217 .post_div_val = 0x0,
264 .post_div_val = 0x0,
Dgcc-ipq6018.c4161 .post_div_val = 0x0,
4173 .post_div_val = 0x1 << 8,
Dgcc-qcs404.c359 .post_div_val = 0x1 << 8,
Dmmcc-msm8960.c148 .post_div_val = 0x0,