Searched refs:ref_clks (Results 1 – 4 of 4) sorted by relevance
904 refclk = dev_priv->dpll.ref_clks.nssc; in hsw_ddi_wrpll_get_freq()914 refclk = dev_priv->dpll.ref_clks.ssc; in hsw_ddi_wrpll_get_freq()1060 i915->dpll.ref_clks.ssc = 135000; in hsw_update_dpll_ref_clks()1063 i915->dpll.ref_clks.nssc = 24000; in hsw_update_dpll_ref_clks()1065 i915->dpll.ref_clks.nssc = 135000; in hsw_update_dpll_ref_clks()1556 i915->dpll.ref_clks.nssc, in skl_ddi_hdmi_pll_dividers()1583 int ref_clock = i915->dpll.ref_clks.nssc; in skl_ddi_wrpll_get_freq()1776 i915->dpll.ref_clks.nssc = i915->cdclk.hw.ref; in skl_update_dpll_ref_clks()2221 return chv_calc_dpll_params(i915->dpll.ref_clks.nssc, &clock); in bxt_ddi_pll_get_freq()2259 i915->dpll.ref_clks.ssc = 100000; in bxt_update_dpll_ref_clks()[all …]
925 dev_priv->dpll.ref_clks.nssc, in i915_shared_dplls_info()926 dev_priv->dpll.ref_clks.ssc); in i915_shared_dplls_info()
61 static const struct pic32_ref_osc_data ref_clks[] = { variable217 clks[nr_clks] = pic32_refo_clk_register(&ref_clks[i], core); in pic32mzda_clk_probe()
1002 } ref_clks; member