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Searched refs:rtw_write32_mask (Results 1 – 14 of 14) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/wireless/realtek/rtw88/
Drtw8822c.c352 rtw_write32_mask(rtwdev, 0x1d58, 0xff8, 0x1ff); in rtw8822c_dac_bb_setting()
353 rtw_write32_mask(rtwdev, 0x1a00, 0x3, 0x2); in rtw8822c_dac_bb_setting()
354 rtw_write32_mask(rtwdev, 0x1a14, 0x300, 0x3); in rtw8822c_dac_bb_setting()
356 rtw_write32_mask(rtwdev, 0x180c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
357 rtw_write32_mask(rtwdev, 0x410c, 0x3, 0x0); in rtw8822c_dac_bb_setting()
362 rtw_write32_mask(rtwdev, 0x1e24, BIT(31), 0x0); in rtw8822c_dac_bb_setting()
363 rtw_write32_mask(rtwdev, 0x1e28, 0xf, 0x3); in rtw8822c_dac_bb_setting()
391 rtw_write32_mask(rtwdev, base_addr + 0x30, BIT(30), 0x0); in rtw8822c_dac_cal_adc()
496 rtw_write32_mask(rtwdev, base_addr + 0xbc, 0xf0000000, 0x0); in rtw8822c_dac_cal_step2()
497 rtw_write32_mask(rtwdev, base_addr + 0xc0, 0xf, 0x8); in rtw8822c_dac_cal_step2()
[all …]
Drtw8822b.c69 rtw_write32_mask(rtwdev, 0x64, BIT(29) | BIT(28), 0x3); in rtw8822b_phy_rfe_init()
70 rtw_write32_mask(rtwdev, 0x4c, BIT(26) | BIT(25), 0x0); in rtw8822b_phy_rfe_init()
71 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
74 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
75 rtw_write32_mask(rtwdev, 0x1990, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
78 rtw_write32_mask(rtwdev, 0x974, 0x3f, 0x3f); in rtw8822b_phy_rfe_init()
79 rtw_write32_mask(rtwdev, 0x974, (BIT(11) | BIT(10)), 0x3); in rtw8822b_phy_rfe_init()
151 rtw_write32_mask(rtwdev, 0x24, 0x7e000000, crystal_cap); in rtw8822b_phy_set_param()
152 rtw_write32_mask(rtwdev, 0x28, 0x7e, crystal_cap); in rtw8822b_phy_set_param()
457 rtw_write32_mask(rtwdev, REG_CCASEL, MASKDWORD, reg82c); in rtw8822b_set_channel_cca()
[all …]
Drtw8821c.c141 rtw_write32_mask(rtwdev, REG_AFE_XTAL_CTRL, 0x7e000000, crystal_cap); in rtw8821c_phy_set_param()
142 rtw_write32_mask(rtwdev, REG_AFE_PLL_CTRL, 0x7e, crystal_cap); in rtw8821c_phy_set_param()
143 rtw_write32_mask(rtwdev, REG_CCK0_FAREPORT, BIT(18) | BIT(22), 0); in rtw8821c_phy_set_param()
276 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
277 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
278 rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
279 rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
282 rtw_write32_mask(rtwdev, REG_ACBB0, BIT(29) | BIT(28), 0x2); in rtw8821c_set_channel_rxdfir()
283 rtw_write32_mask(rtwdev, REG_ACBBRXFIR, BIT(29) | BIT(28), 0x1); in rtw8821c_set_channel_rxdfir()
284 rtw_write32_mask(rtwdev, REG_TXDFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
[all …]
Drtw8723d.c156 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL, in rtw8723d_phy_set_param()
200 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in rtw8723d_phy_set_param()
201 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x20); in rtw8723d_phy_set_param()
394 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x1f); in rtw8723d_cfg_notch()
395 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x0); in rtw8723d_cfg_notch()
400 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x0); in rtw8723d_cfg_notch()
406 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0xb); in rtw8723d_cfg_notch()
407 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x1); in rtw8723d_cfg_notch()
412 rtw_write32_mask(rtwdev, REG_OFDM1_CFOTRK, BIT_EN_CFOTRK, 0x1); in rtw8723d_cfg_notch()
415 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_MASK_RXDSP, 0x5); in rtw8723d_cfg_notch()
[all …]
Drtw8822b.h104 rtw_write32_mask(rtwdev, addr, mask, data); in _rtw_write32s_mask()
105 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
Defuse.c16 rtw_write32_mask(rtwdev, REG_LDO_EFUSE_CTRL, BIT_MASK_EFUSE_BANK_SEL, in switch_efuse_bank()
130 rtw_write32_mask(rtwdev, REG_EFUSE_CTRL, 0x3ff00, addr); in rtw_read8_physical_efuse()
Drtw8821c.h83 rtw_write32_mask(rtwdev, addr, mask, data); in _rtw_write32s_mask()
84 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
Dmac80211.c332 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_TXOP_LMT, params->txop); in __rtw_conf_tx()
333 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMAX, ecw_max); in __rtw_conf_tx()
334 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMIN, ecw_min); in __rtw_conf_tx()
335 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_AIFS, aifs); in __rtw_conf_tx()
Dphy.c155 rtw_write32_mask(rtwdev, dig_cck->addr, dig_cck->mask, igi >> 1); in rtw_phy_dig_write()
161 rtw_write32_mask(rtwdev, addr, mask, igi); in rtw_phy_dig_write()
816 rtw_write32_mask(rtwdev, direct_addr, mask, data); in rtw_phy_write_rf_reg()
1491 rtw_write32_mask(rtwdev, 0x1e24, BIT(17), 0x1); in rtw_load_rfk_table()
1492 rtw_write32_mask(rtwdev, 0x1cd0, BIT(28), 0x1); in rtw_load_rfk_table()
1493 rtw_write32_mask(rtwdev, 0x1cd0, BIT(29), 0x1); in rtw_load_rfk_table()
1494 rtw_write32_mask(rtwdev, 0x1cd0, BIT(30), 0x1); in rtw_load_rfk_table()
1495 rtw_write32_mask(rtwdev, 0x1cd0, BIT(31), 0x0); in rtw_load_rfk_table()
Dps.c143 rtw_write32_mask(rtwdev, REG_TCR, BIT_PWRMGT_HWDATA_EN, 0); in rtw_fw_leave_lps_state_check()
Dhci.h229 rtw_write32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) in rtw_write32_mask() function
Dbf.c371 rtw_write32_mask(rtwdev, REG_BBPSF_CTRL, BIT_MASK_CSI_RATE, in rtw_bf_phy_init()
Dpci.c1189 rtw_write32_mask(rtwdev, REG_PCIE_MIX_CFG, BIT_MDIO_WFLAG_V1, 1); in rtw_mdio_write()
1314 rtw_write32_mask(rtwdev, REG_HCI_MIX_CFG, in rtw_pci_interface_cfg()
Dmain.c647 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); in rtw_vif_port_config()
652 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); in rtw_vif_port_config()