Searched refs:shared_timings (Results 1 – 4 of 4) sorted by relevance
| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/phy/ |
| D | dsi_phy.c | 112 timing->shared_timings.clk_post = linear_inter(tmax, tmin, pcnt2, 0, in msm_dsi_dphy_timing_calc()
121 timing->shared_timings.clk_pre = temp >> 1; in msm_dsi_dphy_timing_calc()
122 timing->shared_timings.clk_pre_inc_by_2 = true; in msm_dsi_dphy_timing_calc()
124 timing->shared_timings.clk_pre = in msm_dsi_dphy_timing_calc()
126 timing->shared_timings.clk_pre_inc_by_2 = false; in msm_dsi_dphy_timing_calc()
134 timing->shared_timings.clk_pre, timing->shared_timings.clk_post, in msm_dsi_dphy_timing_calc()
135 timing->shared_timings.clk_pre_inc_by_2, timing->clk_zero, in msm_dsi_dphy_timing_calc()
224 timing->shared_timings.clk_post = in msm_dsi_dphy_timing_calc_v2()
235 timing->shared_timings.clk_pre = temp >> 1; in msm_dsi_dphy_timing_calc_v2()
236 timing->shared_timings.clk_pre_inc_by_2 = 1; in msm_dsi_dphy_timing_calc_v2()
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| D | dsi_phy_7nm.c | 189 timing->shared_timings.clk_pre); in dsi_7nm_phy_enable()
191 timing->shared_timings.clk_post); in dsi_7nm_phy_enable()
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| D | dsi_phy.h | 67 struct msm_dsi_phy_shared_timings shared_timings; member
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| /kernel/linux/linux-5.10/drivers/gpu/drm/msm/dsi/ |
| D | dsi_manager.c | 125 struct msm_dsi_phy_shared_timings *shared_timings) in enable_phy() argument
134 msm_dsi_phy_get_shared_timings(msm_dsi->phy, shared_timings); in enable_phy()
141 struct msm_dsi_phy_shared_timings shared_timings[DSI_MAX]) in dsi_mgr_phy_enable()
160 &shared_timings[DSI_CLOCK_MASTER]); in dsi_mgr_phy_enable()
164 &shared_timings[DSI_CLOCK_SLAVE]); in dsi_mgr_phy_enable()
172 ret = enable_phy(msm_dsi, src_pll_id, &shared_timings[id]); in dsi_mgr_phy_enable()
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