Home
last modified time | relevance | path

Searched refs:shmem_base (Results 1 – 8 of 8) sorted by relevance

/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_link.c269 link_status = REG_RD(bp, params->shmem_base + in bnx2x_check_lfa()
2103 REG_WR(bp, params->shmem_base + in bnx2x_update_mng()
2885 eee_mode = ((REG_RD(bp, params->shmem_base + in bnx2x_eee_calc_timer()
3062 board_cfg = REG_RD(bp, params->shmem_base + in bnx2x_bsc_module_sel()
3070 sfp_ctrl = REG_RD(bp, params->shmem_base + in bnx2x_bsc_module_sel()
3812 if (REG_RD(bp, params->shmem_base + in bnx2x_warpcore_enable_AN_KR()
3852 wc_lane_config = REG_RD(bp, params->shmem_base + in bnx2x_warpcore_enable_AN_KR()
4004 cfg_tap_val = REG_RD(bp, params->shmem_base + in bnx2x_warpcore_set_10G_XFI()
4330 u32 shmem_base, u8 port, in bnx2x_get_mod_abs_int_cfg() argument
4337 cfg_pin = (REG_RD(bp, shmem_base + in bnx2x_get_mod_abs_int_cfg()
[all …]
Dbnx2x_link.h261 u32 shmem_base; member
451 u8 bnx2x_fan_failure_det_req(struct bnx2x *bp, u32 shmem_base,
542 u32 chip_id, u32 shmem_base, u32 shmem2_base,
Dbnx2x_main.c795 trace_shmem_base = bp->common.shmem_base; in bnx2x_fw_dump_lvl()
6538 bp->common.shmem_base, in bnx2x_pre_irq_nic_init()
6960 bp->common.shmem_base, in bnx2x_setup_fan_failure_detection()
6996 u32 shmem_base[2], shmem2_base[2]; in bnx2x__common_init_phy() local
7001 shmem_base[0] = bp->common.shmem_base; in bnx2x__common_init_phy()
7004 shmem_base[1] = in bnx2x__common_init_phy()
7010 bnx2x_common_init_phy(bp, shmem_base, shmem2_base, in bnx2x__common_init_phy()
9642 bp->common.shmem_base = REG_RD(bp, MISC_REG_SHARED_MEM_ADDR); in bnx2x_init_shmem()
9647 if (bp->common.shmem_base == 0xFFFFFFFF) { in bnx2x_init_shmem()
9652 if (bp->common.shmem_base) { in bnx2x_init_shmem()
[all …]
Dbnx2x.h210 #define SHMEM_ADDR(bp, field) (bp->common.shmem_base + \
968 u32 shmem_base; member
/kernel/linux/linux-5.10/drivers/net/ethernet/broadcom/
Dcnic.h310 u32 shmem_base; member
Dbnx2.c290 bnx2_reg_wr_ind(bp, bp->shmem_base + offset, val); in bnx2_shmem_wr()
296 return bnx2_reg_rd_ind(bp, bp->shmem_base + offset); in bnx2_shmem_rd()
1967 addr = bp->shmem_base + BNX2_DRV_PULSE_MB; in bnx2_send_heart_beat()
8267 bp->shmem_base = bnx2_reg_rd_ind(bp, BNX2_SHM_HDR_ADDR_0 + off); in bnx2_init_board()
8269 bp->shmem_base = HOST_VIEW_SHMEM_BASE; in bnx2_init_board()
Dcnic.c4680 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val); in cnic_set_bnx2_mac()
4682 val = cnic_reg_rd_ind(dev, cp->shmem_base + in cnic_set_bnx2_mac()
4689 val = cnic_reg_rd_ind(dev, cp->shmem_base + in cnic_set_bnx2_mac()
Dbnx2.h6971 u32 shmem_base; member