/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
D | smu7_clockpowergating.c | 30 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_uvd_dpm() 38 return smum_send_msg_to_smc(hwmgr, enable ? in smu7_enable_disable_vce_dpm() 61 return smum_send_msg_to_smc(hwmgr, in smu7_powerdown_uvd() 86 return smum_send_msg_to_smc(hwmgr, in smu7_powerdown_vce() 95 return smum_send_msg_to_smc(hwmgr, in smu7_powerup_vce() 434 return smum_send_msg_to_smc(hwmgr, in smu7_powergate_gfx()
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D | smu10_hwmgr.c | 352 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableGfxOff, NULL); in smu10_disable_gfx_off() 372 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableGfxOff, NULL); in smu10_enable_gfx_off() 505 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &result); in smu10_populate_clock_table() 508 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &result); in smu10_populate_clock_table() 953 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency, &now); in smu10_print_clock_levels() 974 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency, &now); in smu10_print_clock_levels() 995 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMinGfxclkFrequency, &min_freq); in smu10_print_clock_levels() 996 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxGfxclkFrequency, &max_freq); in smu10_print_clock_levels() 1205 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetGfxclkFrequency, &sclk); in smu10_read_sensor() 1211 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetFclkFrequency, &mclk); in smu10_read_sensor() [all …]
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D | vega20_baco.c | 103 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ExitBaco, NULL)) in vega20_baco_set_state() 121 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_BacoWorkAroundFlushVDCI, NULL); in vega20_baco_apply_vdci_flush_workaround()
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D | smu7_thermal.c | 187 return smum_send_msg_to_smc(hwmgr, PPSMC_StopFanControl, NULL); in smu7_fan_ctrl_stop_smc_fan_control() 376 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Thermal_Cntl_Enable, NULL); in smu7_thermal_enable_alert() 394 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Thermal_Cntl_Disable, NULL); in smu7_thermal_disable_alert()
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D | smu7_hwmgr.c | 192 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_Voltage_Cntl_Enable, NULL); in smu7_enable_smc_voltage_controller() 499 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ResetToDefaults, NULL); in smu7_reset_to_default() 1031 return smum_send_msg_to_smc(hwmgr, in smu7_enable_vrhot_gpio_interrupt() 1050 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableULV, NULL); in smu7_enable_ulv() 1060 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableULV, NULL); in smu7_disable_ulv() 1069 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MASTER_DeepSleep_ON, NULL)) in smu7_enable_deep_sleep_master_switch() 1074 if (smum_send_msg_to_smc(hwmgr, in smu7_enable_deep_sleep_master_switch() 1090 if (smum_send_msg_to_smc(hwmgr, in smu7_disable_deep_sleep_master_switch() 1145 (0 == smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DPM_Enable, NULL)), in smu7_enable_sclk_mclk_dpm() 1156 (0 == smum_send_msg_to_smc(hwmgr, in smu7_enable_sclk_mclk_dpm() [all …]
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D | smu8_hwmgr.c | 165 smum_send_msg_to_smc(hwmgr, in smu8_get_max_sclk_level() 594 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxUvdLevel, &level); in smu8_init_uvd_limit() 621 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxEclkLevel, &level); in smu8_init_vce_limit() 648 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetMaxAclkLevel, &level); in smu8_init_acp_limit() 670 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF, NULL); in smu8_init_power_gate_state() 1251 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UVDPowerOFF, NULL); in smu8_dpm_powerdown_uvd() 1305 return smum_send_msg_to_smc(hwmgr, in smu8_dpm_powerdown_vce() 1314 return smum_send_msg_to_smc(hwmgr, in smu8_dpm_powerup_vce() 1788 result = smum_send_msg_to_smc(hwmgr, in smu8_read_sensor() 1948 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ACPPowerOFF, NULL); in smu8_dpm_powergate_acp() [all …]
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D | smu7_powertune.c | 1014 result = smum_send_msg_to_smc(hwmgr, in smu7_enable_didt_config() 1048 result = smum_send_msg_to_smc(hwmgr, in smu7_disable_didt_config() 1070 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_enable_smc_cac() 1087 int smc_result = smum_send_msg_to_smc(hwmgr, in smu7_disable_smc_cac() 1137 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_enable_power_containment() 1148 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_enable_power_containment() 1178 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_disable_power_containment() 1188 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_disable_power_containment() 1198 smc_result = smum_send_msg_to_smc(hwmgr, in smu7_disable_power_containment()
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D | vega10_baco.c | 101 if (smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnterBaco, NULL)) in vega10_baco_set_state()
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D | vega12_thermal.c | 34 PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr, in vega12_get_current_rpm()
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D | vega10_hwmgr.c | 489 smum_send_msg_to_smc(hwmgr, in vega10_init_dpm_defaults() 509 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega10_init_dpm_defaults() 510 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega10_init_dpm_defaults() 2359 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_InitializeAcg, NULL); in vega10_acg_enable() 2361 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc, &agc_btc_response); in vega10_acg_enable() 2365 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgInClosedLoop, NULL); in vega10_acg_enable() 2367 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgInOpenLoop, NULL); in vega10_acg_enable() 2484 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega10_populate_and_upload_avfs_fuse_override() 2486 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega10_populate_and_upload_avfs_fuse_override() 3880 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrPkgPwr, &value); in vega10_get_gpu_power() [all …]
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D | vega12_hwmgr.c | 368 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega12_init_dpm_defaults() 369 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega12_init_dpm_defaults() 856 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAcgBtc, &result) == 0, in vega12_run_acg_btc() 918 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAllSmuFeatures, NULL) == 0, in vega12_enable_all_smu_features() 944 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisableAllSmuFeatures, NULL) == 0, in vega12_disable_all_smu_features() 2773 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_AllowGfxOff, NULL); in vega12_enable_gfx_off() 2785 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_DisallowGfxOff, NULL); in vega12_disable_gfx_off() 2822 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg, NULL)) == 0, in vega12_set_mp1_state()
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D | vega20_thermal.c | 108 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_get_current_rpm()
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D | vega20_hwmgr.c | 100 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion, &hwmgr->smu_version); in vega20_set_default_registry_data() 408 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumTop32, &top32); in vega20_init_dpm_defaults() 409 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ReadSerialNumBottom32, &bottom32); in vega20_init_dpm_defaults() 951 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunBtc, NULL); in vega20_run_btc() 956 return smum_send_msg_to_smc(hwmgr, PPSMC_MSG_RunAfllBtc, NULL); in vega20_run_btc_afll() 968 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_enable_all_smu_features() 1026 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_disable_all_smu_features() 1668 result = smum_send_msg_to_smc(hwmgr, in vega20_enable_mgpu_fan_boost() 3189 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, msg, NULL)) == 0, in vega20_set_mp1_state()
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D | vega10_thermal.c | 34 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetCurrentRpm, current_rpm); in vega10_get_current_rpm()
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/inc/ |
D | smumgr.h | 88 extern int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp);
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/kernel/linux/linux-5.10/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
D | smu10_smumgr.c | 190 smum_send_msg_to_smc(hwmgr, in smu10_verify_smc_interface() 226 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_GetSmuVersion, &hwmgr->smu_version); in smu10_start_smu()
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D | vega10_smumgr.c | 138 smum_send_msg_to_smc(hwmgr, in vega10_get_enabled_smc_features() 182 PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr, in vega10_verify_smc_interface()
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D | vega12_smumgr.c | 165 PP_ASSERT_WITH_CODE(smum_send_msg_to_smc(hwmgr, in vega12_get_enabled_smc_features() 171 PP_ASSERT_WITH_CODE(smum_send_msg_to_smc(hwmgr, in vega12_get_enabled_smc_features()
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D | smu8_smumgr.c | 627 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ClkTableXferToDram, NULL); in smu8_download_pptable_settings() 657 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ClkTableXferToSmu, NULL); in smu8_upload_pptable_settings() 690 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_InitJobs, NULL); in smu8_request_smu_load_fw()
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D | smumgr.c | 130 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t *resp) in smum_send_msg_to_smc() function
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D | vega20_smumgr.c | 360 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_get_enabled_smc_features() 365 PP_ASSERT_WITH_CODE((ret = smum_send_msg_to_smc(hwmgr, in vega20_get_enabled_smc_features()
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D | polaris10_smumgr.c | 2056 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs, NULL); in polaris10_thermal_avfs_enable() 2062 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_ApplyAvfsCksOffVoltage, NULL); in polaris10_thermal_avfs_enable() 2494 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL); in polaris10_update_dpm_settings() 2524 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL); in polaris10_update_dpm_settings() 2529 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL); in polaris10_update_dpm_settings() 2559 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL); in polaris10_update_dpm_settings()
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D | fiji_smumgr.c | 2247 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs, NULL); in fiji_thermal_avfs_enable() 2576 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL); in fiji_update_dpm_settings() 2606 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL); in fiji_update_dpm_settings() 2611 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL); in fiji_update_dpm_settings() 2641 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL); in fiji_update_dpm_settings()
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D | vegam_smumgr.c | 2068 !smum_send_msg_to_smc(hwmgr, PPSMC_MSG_UseNewGPIOScheme, NULL)) in vegam_init_smc_table() 2258 ret = smum_send_msg_to_smc(hwmgr, PPSMC_MSG_EnableAvfs, NULL); in vegam_thermal_avfs_enable() 2261 ret = smum_send_msg_to_smc(hwmgr, in vegam_thermal_avfs_enable()
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D | ci_smumgr.c | 2784 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_FreezeLevel, NULL); in ci_update_dpm_settings() 2814 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_SCLKDPM_UnfreezeLevel, NULL); in ci_update_dpm_settings() 2819 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_FreezeLevel, NULL); in ci_update_dpm_settings() 2849 smum_send_msg_to_smc(hwmgr, PPSMC_MSG_MCLKDPM_UnfreezeLevel, NULL); in ci_update_dpm_settings()
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