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Searched refs:vba (Results 1 – 15 of 15) sorted by relevance

/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn20/
Ddisplay_mode_vba_20.c237 mode_lib->vba.FabricAndDRAMBandwidth = dml_min( in dml20_recalculate()
238 mode_lib->vba.DRAMSpeed * mode_lib->vba.NumberOfChannels * mode_lib->vba.DRAMChannelWidth, in dml20_recalculate()
239 mode_lib->vba.FabricClock * mode_lib->vba.FabricDatapathToDCNDataReturn) / 1000.0; in dml20_recalculate()
255 > mode_lib->vba.DCFCLK * mode_lib->vba.ReturnBusWidth / 4.0) in adjust_ReturnBW()
261 - mode_lib->vba.UrgentLatencyPixelDataOnly in adjust_ReturnBW()
262 / ((mode_lib->vba.ROBBufferSizeInKByte in adjust_ReturnBW()
263 - mode_lib->vba.PixelChunkSizeInKByte) in adjust_ReturnBW()
266 - mode_lib->vba.DCFCLK in adjust_ReturnBW()
267 * mode_lib->vba.ReturnBusWidth in adjust_ReturnBW()
269 + mode_lib->vba.UrgentLatencyPixelDataOnly)); in adjust_ReturnBW()
[all …]
Ddisplay_mode_vba_20v2.c261 mode_lib->vba.FabricAndDRAMBandwidth = dml_min( in dml20v2_recalculate()
262 mode_lib->vba.DRAMSpeed * mode_lib->vba.NumberOfChannels * mode_lib->vba.DRAMChannelWidth, in dml20v2_recalculate()
263 mode_lib->vba.FabricClock * mode_lib->vba.FabricDatapathToDCNDataReturn) / 1000.0; in dml20v2_recalculate()
279 > mode_lib->vba.DCFCLK * mode_lib->vba.ReturnBusWidth / 4.0) in adjust_ReturnBW()
285 - mode_lib->vba.UrgentLatencyPixelDataOnly in adjust_ReturnBW()
286 / ((mode_lib->vba.ROBBufferSizeInKByte in adjust_ReturnBW()
287 - mode_lib->vba.PixelChunkSizeInKByte) in adjust_ReturnBW()
290 - mode_lib->vba.DCFCLK in adjust_ReturnBW()
291 * mode_lib->vba.ReturnBusWidth in adjust_ReturnBW()
293 + mode_lib->vba.UrgentLatencyPixelDataOnly)); in adjust_ReturnBW()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/
Ddisplay_mode_vba.c56 bool need_recalculate = memcmp(&mode_lib->soc, &mode_lib->vba.soc, sizeof(mode_lib->vba.soc)) != 0 in dml_get_voltage_level()
57 || memcmp(&mode_lib->ip, &mode_lib->vba.ip, sizeof(mode_lib->vba.ip)) != 0 in dml_get_voltage_level()
58 || num_pipes != mode_lib->vba.cache_num_pipes in dml_get_voltage_level()
59 || memcmp(pipes, mode_lib->vba.cache_pipes, in dml_get_voltage_level()
62 mode_lib->vba.soc = mode_lib->soc; in dml_get_voltage_level()
63 mode_lib->vba.ip = mode_lib->ip; in dml_get_voltage_level()
64 memcpy(mode_lib->vba.cache_pipes, pipes, sizeof(*pipes) * num_pipes); in dml_get_voltage_level()
65 mode_lib->vba.cache_num_pipes = num_pipes; in dml_get_voltage_level()
77 return mode_lib->vba.VoltageLevel; in dml_get_voltage_level()
86 dml_get_attr_func(clk_dcf_deepsleep, mode_lib->vba.DCFCLKDeepSleep);
[all …]
Ddisplay_mode_lib.c258 for (i = mode_lib->vba.soc.num_states; i >= 0; i--) { in dml_log_mode_support_params()
261 …dml_print("DML SUPPORT: Mode Supported : %s\n", mode_lib->vba.ModeSupport[i][0] ?… in dml_log_mode_support_params()
262 …dml_print("DML SUPPORT: Mode Supported (pipe split) : %s\n", mode_lib->vba.ModeSupport[i][1] ?… in dml_log_mode_support_params()
263 …dml_print("DML SUPPORT: Scale Ratio And Taps : %s\n", mode_lib->vba.ScaleRatioA… in dml_log_mode_support_params()
264 …dml_print("DML SUPPORT: Source Format Pixel And Scan : %s\n", mode_lib->vba.SourceForma… in dml_log_mode_support_params()
265 … : [%s, %s]\n", mode_lib->vba.ViewportSizeSupport[i][0] ? "Supported" : "NOT Supported… in dml_log_mode_support_params()
266 …dml_print("DML SUPPORT: DIO Support : %s\n", mode_lib->vba.DIOSupport[… in dml_log_mode_support_params()
267 …dml_print("DML SUPPORT: ODM Combine 4To1 Support Check : %s\n", mode_lib->vba.ODMCombine4… in dml_log_mode_support_params()
268 …dml_print("DML SUPPORT: DSC Units : %s\n", mode_lib->vba.NotEnoughDS… in dml_log_mode_support_params()
269 …dml_print("DML SUPPORT: DSCCLK Required : %s\n", mode_lib->vba.DSCCLKRequi… in dml_log_mode_support_params()
[all …]
Ddisplay_mode_lib.h72 struct vba_vars_st vba; member
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn21/
Ddisplay_mode_vba_21.c1224 if (!mode_lib->vba.IgnoreViewportPositioning) { in CalculatePrefetchSourceLines()
1331 …MPDEBytesFrame = 128 * ((mode_lib->vba.GPUVMMaxPageTableLevels + 1) * (mode_lib->vba.HostVMMaxPage… in CalculateVMAndRowBytes()
1361 …if (GPUVMEnable == true && (mode_lib->vba.GPUVMMaxPageTableLevels + 1) * (mode_lib->vba.HostVMMaxP… in CalculateVMAndRowBytes()
1367 …ExtraDPDEBytesFrame = 128 * ((mode_lib->vba.GPUVMMaxPageTableLevels + 1) * (mode_lib->vba.HostVMMa… in CalculateVMAndRowBytes()
1466 struct vba_vars_st *locals = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1469 mode_lib->vba.WritebackDISPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1470 mode_lib->vba.DISPCLKWithRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1471 mode_lib->vba.DISPCLKWithoutRamping = 0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1472 mode_lib->vba.GlobalDPPCLK = 0.0; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
1476 for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) { in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
[all …]
/kernel/linux/linux-5.10/mm/
Dpagewalk.c524 pgoff_t vba, vea, cba, cea; in walk_page_mapping() local
532 vba = vma->vm_pgoff; in walk_page_mapping()
533 vea = vba + vma_pages(vma); in walk_page_mapping()
535 cba = max(cba, vba); in walk_page_mapping()
539 start_addr = ((cba - vba) << PAGE_SHIFT) + vma->vm_start; in walk_page_mapping()
540 end_addr = ((cea - vba) << PAGE_SHIFT) + vma->vm_start; in walk_page_mapping()
Dmemory.c3188 pgoff_t vba, vea, zba, zea; in unmap_mapping_range_tree() local
3193 vba = vma->vm_pgoff; in unmap_mapping_range_tree()
3194 vea = vba + vma_pages(vma) - 1; in unmap_mapping_range_tree()
3196 if (zba < vba) in unmap_mapping_range_tree()
3197 zba = vba; in unmap_mapping_range_tree()
3203 ((zba - vba) << PAGE_SHIFT) + vma->vm_start, in unmap_mapping_range_tree()
3204 ((zea - vba + 1) << PAGE_SHIFT) + vma->vm_start, in unmap_mapping_range_tree()
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dml/dcn30/
Ddisplay_mode_vba_30.c1697 if (!mode_lib->vba.IgnoreViewportPositioning) { in CalculatePrefetchSourceLines()
1801 MPDEBytesFrame = 128 * (mode_lib->vba.GPUVMMaxPageTableLevels - 1); in CalculateVMAndRowBytes()
1822 if (GPUVMEnable == true && mode_lib->vba.GPUVMMaxPageTableLevels > 1) { in CalculateVMAndRowBytes()
1828 ExtraDPDEBytesFrame = 128 * (mode_lib->vba.GPUVMMaxPageTableLevels - 2); in CalculateVMAndRowBytes()
1921 struct vba_vars_st *v = &mode_lib->vba; in DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation()
3164 for (k = 0; k < mode_lib->vba.NumberOfActivePlanes; ++k) { in DisplayPipeConfiguration()
3167 mode_lib->vba.SourcePixelFormat[k], in DisplayPipeConfiguration()
3168 mode_lib->vba.SurfaceTiling[k], in DisplayPipeConfiguration()
3180 mode_lib->vba.NumberOfActivePlanes, in DisplayPipeConfiguration()
3181 mode_lib->vba.DETBufferSizeInKByte, in DisplayPipeConfiguration()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn30/
Ddcn30_resource.c1623 …wb_arb_params->dram_speed_change_duration = dml->vba.WritebackAllowDRAMClockChangeEndPosition[j] *… in dcn30_set_mcif_arb_params()
1957 struct vba_vars_st *vba = &context->bw_ctx.dml.vba; in dcn30_internal_validate_bw() local
1986 vba->DRAMClockChangeSupport[vlevel][vba->maxMpcComb] == dm_dram_clock_change_unsupported) { in dcn30_internal_validate_bw()
2032 if (vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled in dcn30_internal_validate_bw()
2100 odm = vba->ODMCombineEnabled[vba->pipe_plane[pipe_idx]] != dm_odm_combine_mode_disabled; in dcn30_internal_validate_bw()
2186 vba->ValidationStatus[vba->soc.num_states] = DML_FAIL_DSC_VALIDATION_FAILURE; in dcn30_internal_validate_bw()
2212 double dcfclk = context->bw_ctx.dml.vba.DCFCLKState[vlevel][context->bw_ctx.dml.vba.maxMpcComb]; in dcn30_calculate_wm_and_dlg()
2213 …bool pstate_en = context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.ma… in dcn30_calculate_wm_and_dlg()
2275 unsigned int min_dram_speed_mts = context->bw_ctx.dml.vba.DRAMSpeed; in dcn30_calculate_wm_and_dlg()
2280 …if (context->bw_ctx.dml.vba.DRAMClockChangeSupport[vlevel][context->bw_ctx.dml.vba.maxMpcComb] == … in dcn30_calculate_wm_and_dlg()
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c2660 struct vba_vars_st *v = &context->bw_ctx.dml.vba;
2885 …if (!pipe->top_pipe && !pipe->plane_state && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) {
2904 && context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx])
2913 … context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx] *= 2;
2916 if (context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx]) {
2938 context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_states] =
2969 …pe_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel][context->bw_ctx.dml…
2973 context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx];
2974 if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_idx] == pipe_idx)
2976 context->bw_ctx.dml.vba.ODMCombineEnabled[pipe_idx];
[all …]
/kernel/linux/linux-5.10/drivers/gpu/drm/amd/display/dc/dcn21/
Ddcn21_resource.c1108 …_cnt].clks_cfg.dispclk_mhz = context->bw_ctx.dml.vba.RequiredDISPCLK[vlevel_req][context->bw_ctx.d… in dcn21_calculate_wm()
1112 … context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_idx]; in dcn21_calculate_wm()
1113 if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_idx] == pipe_idx) in dcn21_calculate_wm()
1115 context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel_req][pipe_idx]; in dcn21_calculate_wm()
1121 …context->bw_ctx.dml.vba.RequiredDPPCLK[vlevel_req][context->bw_ctx.dml.vba.maxMpcComb][pipe_split_… in dcn21_calculate_wm()
1122 if (context->bw_ctx.dml.vba.BlendingAndTiming[pipe_split_from[i]] == pipe_split_from[i]) in dcn21_calculate_wm()
1124 context->bw_ctx.dml.vba.ODMCombineEnablePerState[vlevel_req][pipe_split_from[i]]; in dcn21_calculate_wm()
1214 …dml_get_status_message(context->bw_ctx.dml.vba.ValidationStatus[context->bw_ctx.dml.vba.soc.num_st… in dcn21_validate_bandwidth_fp()
/kernel/linux/linux-5.10/drivers/parisc/
Dccio-dma.c556 ccio_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba, in ccio_io_pdir_entry() argument
570 pa = lpa(vba); in ccio_io_pdir_entry()
595 asm volatile ("lci %%r0(%1), %0" : "=r" (ci) : "r" (vba)); in ccio_io_pdir_entry()
Dsba_iommu.c566 sba_io_pdir_entry(u64 *pdir_ptr, space_t sid, unsigned long vba, in sba_io_pdir_entry() argument
572 pa = lpa(vba); in sba_io_pdir_entry()
575 asm("lci 0(%1), %0" : "=r" (ci) : "r" (vba)); in sba_io_pdir_entry()
/kernel/linux/linux-5.10/arch/ia64/hp/common/
Dsba_iommu.c790 #define sba_io_pdir_entry(pdir_ptr, vba) *pdir_ptr = ((vba & ~0xE000000000000FFFULL) \ argument
794 sba_io_pdir_entry(u64 *pdir_ptr, unsigned long vba) in sba_io_pdir_entry() argument
796 *pdir_ptr = ((vba & ~0xE000000000000FFFULL) | 0x80000000000000FFULL); in sba_io_pdir_entry()