Searched refs:wr_regl (Results 1 – 5 of 5) sorted by relevance
/kernel/linux/linux-5.10/drivers/tty/serial/ |
D | sirfsoc_uart.c | 110 wr_regl(port, ureg->sirfsoc_line_ctrl, in sirfsoc_uart_set_mctrl() 114 wr_regl(port, ureg->sirfsoc_mode1, in sirfsoc_uart_set_mctrl() 119 wr_regl(port, ureg->sirfsoc_line_ctrl, in sirfsoc_uart_set_mctrl() 123 wr_regl(port, ureg->sirfsoc_mode1, in sirfsoc_uart_set_mctrl() 133 wr_regl(port, ureg->sirfsoc_afc_ctrl, val); in sirfsoc_uart_set_mctrl() 154 wr_regl(port, ureg->sirfsoc_int_en_reg, in sirfsoc_uart_stop_tx() 158 wr_regl(port, ureg->sirfsoc_int_en_clr_reg, in sirfsoc_uart_stop_tx() 163 wr_regl(port, ureg->sirfsoc_tx_rx_en, rd_regl(port, in sirfsoc_uart_stop_tx() 166 wr_regl(port, ureg->sirfsoc_int_en_reg, in sirfsoc_uart_stop_tx() 170 wr_regl(port, ureg->sirfsoc_int_en_clr_reg, in sirfsoc_uart_stop_tx() [all …]
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D | samsung_tty.c | 184 #define wr_regl(port, reg, val) writel_relaxed(val, portaddr(port, reg)) macro 197 wr_regl(port, reg, val); in s3c24xx_set_bit() 210 wr_regl(port, reg, val); in s3c24xx_clear_bit() 255 wr_regl(port, S3C2410_UFCON, ufcon); in s3c24xx_serial_rx_enable() 259 wr_regl(port, S3C2410_UCON, ucon); in s3c24xx_serial_rx_enable() 275 wr_regl(port, S3C2410_UCON, ucon); in s3c24xx_serial_rx_disable() 367 wr_regl(port, S3C2410_UCON, ucon); in enable_tx_dma() 380 wr_regl(port, S3C2410_UFCON, ufcon); in enable_tx_pio() 386 wr_regl(port, S3C2410_UCON, ucon); in enable_tx_pio() 642 wr_regl(port, S3C2410_UCON, ucon); in enable_rx_dma() [all …]
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D | sirfsoc_uart.h | 442 #define wr_regl(port, reg, val) __raw_writel(val, portaddr(port, reg)) macro
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/kernel/linux/linux-5.10/drivers/atm/ |
D | horizon.c | 356 static inline void wr_regl (const hrz_dev * dev, unsigned char reg, u32 data) { in wr_regl() function 385 wr_regl (dev, MEM_WR_ADDR_REG_OFF, (addr - (HDW *) 0) * sizeof(HDW)); in wr_mem() 386 wr_regl (dev, MEMORY_PORT_OFF, data); in wr_mem() 391 wr_regl (dev, MEM_RD_ADDR_REG_OFF, (addr - (HDW *) 0) * sizeof(HDW)); in rd_mem() 396 wr_regl (dev, MEM_WR_ADDR_REG_OFF, (u32) addr | 0x80000000); in wr_framer() 397 wr_regl (dev, MEMORY_PORT_OFF, data); in wr_framer() 401 wr_regl (dev, MEM_RD_ADDR_REG_OFF, (u32) addr | 0x80000000); in rd_framer() 434 wr_regl (dev, TX_CHANNEL_PORT_OFF, tx_channel); in SELECT_TX_CHANNEL() 936 wr_regl (dev, MASTER_RX_COUNT_REG_OFF, 0); in rx_schedule() 1019 wr_regl (dev, MASTER_RX_COUNT_REG_OFF, 0); in rx_schedule() [all …]
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D | horizon.h | 478 wr_regl (dev, CONTROL_0_REG, rd_regl (dev, CONTROL_0_REG) | GREEN_LED) 480 wr_regl (dev, CONTROL_0_REG, rd_regl (dev, CONTROL_0_REG) &~ GREEN_LED) 482 wr_regl (dev, CONTROL_0_REG, rd_regl (dev, CONTROL_0_REG) | YELLOW_LED) 484 wr_regl (dev, CONTROL_0_REG, rd_regl (dev, CONTROL_0_REG) &~ YELLOW_LED)
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