Searched refs:ADDS (Results 1 – 14 of 14) sorted by relevance
/third_party/cmsis/CMSIS/DSP/Source/TransformFunctions/ |
D | arm_bitreversal2.S | 93 ADDS r3,r1,#1 95 ADDS r1,r2,#0 110 ADDS r1,r1,#4 118 ADDS r3,r1,#1 120 ADDS r1,r2,#0 133 ADDS r1,r1,#4 143 ADDS r3,r1,#1 148 ADDS r1,r2,#2 175 ADDS r1,r1,#8 183 ADDS r3,r1,#1 [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.h | 56 ADDS, enumerator
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D | AArch64SchedThunderX2T99.td | 423 (instregex "ADD?(W|X)r(i|r|s|x)", "ADDS?(W|X)r(i|r|s|x)(64)?", 445 (instregex "ADD?(W|X)r(i|r|s|x)", "ADDS?(W|X)r(i|r|s|x)(64)?", 464 (instregex "ADD?(W|X)r(i|r|s|x)", "ADDS?(W|X)r(i|r|s|x)(64)?",
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D | AArch64SchedKryoDetails.td | 357 (instregex "ADDS?(W|X)ri")>; 363 (instregex "ADDS?(W|X)r(r|s|x)(64)?")>;
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D | AArch64ISelLowering.cpp | 1251 case AArch64ISD::ADDS: return "AArch64ISD::ADDS"; in getTargetNodeName() 1730 Opcode = AArch64ISD::ADDS; in emitComparison() 1735 Opcode = AArch64ISD::ADDS; in emitComparison() 2218 Opc = AArch64ISD::ADDS; in getAArch64XALUOOp() 2222 Opc = AArch64ISD::ADDS; in getAArch64XALUOOp() 2438 Opc = AArch64ISD::ADDS; in LowerADDC_ADDE_SUBC_SUBE() 12039 if (CmpOpc != AArch64ISD::ADDS && CmpOpc != AArch64ISD::SUBS) in performBRCONDCombine()
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D | AArch64InstrInfo.td | 408 def AArch64add_flag : SDNode<"AArch64ISD::ADDS", SDTBinaryArithWithFlagsOut, 1216 defm ADDS : AddSubS<0, "adds", AArch64add_flag, "cmn", "subs", "cmp">;
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/third_party/pcre2/pcre2/src/sljit/ |
D | sljitNativeARM_T2_32.c | 98 #define ADDS 0x1800 macro 808 return push_inst16(compiler, ADDS | RD3(dst) | RN3(arg1) | RM3(arg2)); in emit_op_imm()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMInstrInfo.td | 3666 // Currently, ADDS/SUBS are pseudo opcodes that exist only in the 3671 // FIXME: Eliminate ADDS/SUBS pseudo opcodes after adding tablegen 3675 defm ADDS : AsI1_bin_s_irs<IIC_iALUi, IIC_iALUr, IIC_iALUsr, ARMaddc, 1>;
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/third_party/freetype/ |
D | ChangeLog.24 | 1802 Avoid ADDS instruction to clobber condition codes.
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/third_party/skia/third_party/externals/freetype/docs/oldlogs/ |
D | ChangeLog.24 | 1802 Avoid ADDS instruction to clobber condition codes.
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/third_party/flutter/skia/third_party/externals/freetype/ |
D | ChangeLog.24 | 1802 Avoid ADDS instruction to clobber condition codes.
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
D | AArch64GenAsmWriter.inc | 12431 // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ADDSWri, ADDS...
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D | AArch64GenAsmWriter1.inc | 13410 // ABSv1i64, ADCSWr, ADCSXr, ADCWr, ADCXr, ADDG, ADDPL_XXI, ADDSWri, ADDS...
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/third_party/icu/icu4j/perf-tests/data/collation/ |
D | ulyss10.txt | 24272 WAIST, ADDS HIS HEAD TO THE GROUP.)
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