1 /*
2 * Copyright 2012 Vadim Girlin <vadimgirlin@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Vadim Girlin
25 */
26
27 #ifndef R600_ISA_H_
28 #define R600_ISA_H_
29
30 #include "util/u_debug.h"
31
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
35
36 /* ALU flags */
37 enum alu_op_flags
38 {
39 AF_NONE = 0,
40 AF_V = (1<<0), /* allowed in vector slots */
41
42 /* allowed in scalar(trans) slot (slots xyz on cayman, may be replicated
43 * to w) */
44 AF_S = (1<<1),
45
46 AF_4SLOT = (1<<2), /* uses four vector slots (e.g. DOT4) */
47 AF_4V = (AF_V | AF_4SLOT),
48 AF_VS = (AF_V | AF_S), /* allowed in any slot */
49
50 AF_2SLOT = (1 << 3),
51 AF_2V = AF_V | AF_2SLOT, /* XY or ZW */
52
53 AF_KILL = (1<<4),
54 AF_PRED = (1<<5),
55 AF_SET = (1<<6),
56
57 /* e.g. MUL_PREV instructions, allowed in x/y, depends on z/w */
58 AF_PREV_INTERLEAVE = (1<<7),
59
60 AF_MOVA = (1<<8), /* all MOVA instructions */
61
62 AF_IEEE = (1<<10),
63
64 AF_DST_TYPE_MASK = (3<<11),
65 AF_FLOAT_DST = 0,
66 AF_INT_DST = (1<<11),
67 AF_UINT_DST = (3<<11),
68
69 /* DP instructions, 2-slot pairs */
70 AF_64 = (1<<13),
71 /* 24 bit instructions */
72 AF_24 = (1<<14),
73 /* DX10 variants */
74 AF_DX10 = (1<<15),
75
76 /* result is replicated to all channels (only if AF_4V is also set -
77 * for special handling of MULLO_INT on CM) */
78 AF_REPL = (1<<16),
79
80 /* interpolation instructions */
81 AF_INTERP = (1<<17),
82
83 /* LDS instructions */
84 AF_LDS = (1<<20),
85
86 /* e.g. DOT - depends on the next slot in the same group (x<=y/y<=z/z<=w) */
87 AF_PREV_NEXT = (1<<21),
88
89 /* int<->flt conversions */
90 AF_CVT = (1<<22),
91
92 /* commutative operation on src0 and src1 ( a op b = b op a),
93 * includes MULADDs (considering the MUL part on src0 and src1 only) */
94 AF_M_COMM = (1 << 23),
95
96 /* associative operation ((a op b) op c) == (a op (b op c)),
97 * includes MULADDs (considering the MUL part on src0 and src1 only) */
98 AF_M_ASSOC = (1 << 24),
99
100 AF_PRED_PUSH = (1 << 25),
101
102 AF_ANY_PRED = (AF_PRED | AF_PRED_PUSH),
103
104 AF_CMOV = (1 << 26),
105
106 // for SETcc, PREDSETcc, ... - type of comparison
107 AF_CMP_TYPE_MASK = (3 << 27),
108 AF_FLOAT_CMP = 0,
109 AF_INT_CMP = (1 << 27),
110 AF_UINT_CMP = (3 << 27),
111
112 /* condition codes - 3 bits */
113 AF_CC_SHIFT = 29,
114
115 AF_CC_MASK = (7U << AF_CC_SHIFT),
116 AF_CC_E = (0U << AF_CC_SHIFT),
117 AF_CC_GT = (1U << AF_CC_SHIFT),
118 AF_CC_GE = (2U << AF_CC_SHIFT),
119 AF_CC_NE = (3U << AF_CC_SHIFT),
120 AF_CC_LT = (4U << AF_CC_SHIFT),
121 AF_CC_LE = (5U << AF_CC_SHIFT),
122 };
123
124 /* flags for FETCH instructions (TEX/VTX/GDS) */
125 enum fetch_op_flags
126 {
127 FF_GDS = (1<<0),
128 FF_TEX = (1<<1),
129
130 FF_SETGRAD = (1<<2),
131 FF_GETGRAD = (1<<3),
132 FF_USEGRAD = (1<<4),
133
134 FF_VTX = (1<<5),
135 FF_MEM = (1<<6),
136
137 FF_SET_TEXTURE_OFFSETS = (1<<7),
138 FF_USE_TEXTURE_OFFSETS = (1<<8),
139 };
140
141 /* flags for CF instructions */
142 enum cf_op_flags
143 {
144 CF_CLAUSE = (1<<0), /* execute clause (alu/fetch ...) */
145 CF_ACK = (1<<1), /* acked versions of some instructions */
146 CF_ALU = (1<<2), /* alu clause execution */
147 CF_ALU_EXT = (1<<3), /* ALU_EXTENDED */
148 CF_EXP = (1<<4), /* export (CF_ALLOC_EXPORT_WORD1_SWIZ) */
149 CF_BRANCH = (1<<5), /* branch instructions */
150 CF_LOOP = (1<<6), /* loop instructions */
151 CF_CALL = (1<<7), /* call instructions */
152 CF_MEM = (1<<8), /* export_mem (CF_ALLOC_EXPORT_WORD1_BUF) */
153 CF_FETCH = (1<<9), /* fetch clause */
154
155 CF_UNCOND = (1<<10), /* COND = ACTIVE required */
156 CF_EMIT = (1<<11),
157 CF_STRM = (1<<12), /* MEM_STREAM* */
158
159 CF_RAT = (1<<13), /* MEM_RAT* */
160
161 CF_LOOP_START = (1<<14)
162 };
163
164 /* ALU instruction info */
165 struct alu_op_info
166 {
167 /* instruction name */
168 const char *name;
169 /* number of source operands */
170 int src_count;
171 /* opcodes, [0] - for r6xx/r7xx, [1] - for evergreen/cayman
172 * (-1) if instruction doesn't exist (more precise info in "slots") */
173 int opcode[2];
174 /* slots for r6xx, r7xx, evergreen, cayman
175 * (0 if instruction doesn't exist for chip class) */
176 int slots[4];
177 /* flags (mostly autogenerated from instruction name) */
178 unsigned int flags;
179 };
180
181 /* FETCH instruction info */
182 struct fetch_op_info
183 {
184 const char * name;
185 /* for every chip class */
186 int opcode[4];
187 int flags;
188 };
189
190 /* CF instruction info */
191 struct cf_op_info
192 {
193 const char * name;
194 /* for every chip class */
195 int opcode[4];
196 int flags;
197 };
198
199
200 #define ALU_OP2_ADD 0
201 #define ALU_OP2_MUL 1
202 #define ALU_OP2_MUL_IEEE 2
203 #define ALU_OP2_MAX 3
204 #define ALU_OP2_MIN 4
205 #define ALU_OP2_MAX_DX10 5
206 #define ALU_OP2_MIN_DX10 6
207 #define ALU_OP2_SETE 7
208 #define ALU_OP2_SETGT 8
209 #define ALU_OP2_SETGE 9
210 #define ALU_OP2_SETNE 10
211 #define ALU_OP2_SETE_DX10 11
212 #define ALU_OP2_SETGT_DX10 12
213 #define ALU_OP2_SETGE_DX10 13
214 #define ALU_OP2_SETNE_DX10 14
215 #define ALU_OP1_FRACT 15
216 #define ALU_OP1_TRUNC 16
217 #define ALU_OP1_CEIL 17
218 #define ALU_OP1_RNDNE 18
219 #define ALU_OP1_FLOOR 19
220 #define ALU_OP2_ASHR_INT 20
221 #define ALU_OP2_LSHR_INT 21
222 #define ALU_OP2_LSHL_INT 22
223 #define ALU_OP1_MOV 23
224 #define ALU_OP0_NOP 24
225 #define ALU_OP2_PRED_SETGT_UINT 25
226 #define ALU_OP2_PRED_SETGE_UINT 26
227 #define ALU_OP2_PRED_SETE 27
228 #define ALU_OP2_PRED_SETGT 28
229 #define ALU_OP2_PRED_SETGE 29
230 #define ALU_OP2_PRED_SETNE 30
231 #define ALU_OP1_PRED_SET_INV 31
232 #define ALU_OP2_PRED_SET_POP 32
233 #define ALU_OP0_PRED_SET_CLR 33
234 #define ALU_OP1_PRED_SET_RESTORE 34
235 #define ALU_OP2_PRED_SETE_PUSH 35
236 #define ALU_OP2_PRED_SETGT_PUSH 36
237 #define ALU_OP2_PRED_SETGE_PUSH 37
238 #define ALU_OP2_PRED_SETNE_PUSH 38
239 #define ALU_OP2_KILLE 39
240 #define ALU_OP2_KILLGT 40
241 #define ALU_OP2_KILLGE 41
242 #define ALU_OP2_KILLNE 42
243 #define ALU_OP2_AND_INT 43
244 #define ALU_OP2_OR_INT 44
245 #define ALU_OP2_XOR_INT 45
246 #define ALU_OP1_NOT_INT 46
247 #define ALU_OP2_ADD_INT 47
248 #define ALU_OP2_SUB_INT 48
249 #define ALU_OP2_MAX_INT 49
250 #define ALU_OP2_MIN_INT 50
251 #define ALU_OP2_MAX_UINT 51
252 #define ALU_OP2_MIN_UINT 52
253 #define ALU_OP2_SETE_INT 53
254 #define ALU_OP2_SETGT_INT 54
255 #define ALU_OP2_SETGE_INT 55
256 #define ALU_OP2_SETNE_INT 56
257 #define ALU_OP2_SETGT_UINT 57
258 #define ALU_OP2_SETGE_UINT 58
259 #define ALU_OP2_KILLGT_UINT 59
260 #define ALU_OP2_KILLGE_UINT 60
261 #define ALU_OP2_PRED_SETE_INT 61
262 #define ALU_OP2_PRED_SETGT_INT 62
263 #define ALU_OP2_PRED_SETGE_INT 63
264 #define ALU_OP2_PRED_SETNE_INT 64
265 #define ALU_OP2_KILLE_INT 65
266 #define ALU_OP2_KILLGT_INT 66
267 #define ALU_OP2_KILLGE_INT 67
268 #define ALU_OP2_KILLNE_INT 68
269 #define ALU_OP2_PRED_SETE_PUSH_INT 69
270 #define ALU_OP2_PRED_SETGT_PUSH_INT 70
271 #define ALU_OP2_PRED_SETGE_PUSH_INT 71
272 #define ALU_OP2_PRED_SETNE_PUSH_INT 72
273 #define ALU_OP2_PRED_SETLT_PUSH_INT 73
274 #define ALU_OP2_PRED_SETLE_PUSH_INT 74
275 #define ALU_OP1_FLT_TO_INT 75
276 #define ALU_OP1_BFREV_INT 76
277 #define ALU_OP2_ADDC_UINT 77
278 #define ALU_OP2_SUBB_UINT 78
279 #define ALU_OP0_GROUP_BARRIER 79
280 #define ALU_OP0_GROUP_SEQ_BEGIN 80
281 #define ALU_OP0_GROUP_SEQ_END 81
282 #define ALU_OP2_SET_MODE 82
283 #define ALU_OP0_SET_CF_IDX0 83
284 #define ALU_OP0_SET_CF_IDX1 84
285 #define ALU_OP2_SET_LDS_SIZE 85
286 #define ALU_OP2_MUL_INT24 86
287 #define ALU_OP2_MULHI_INT24 87
288 #define ALU_OP1_FLT_TO_INT_TRUNC 88
289 #define ALU_OP1_EXP_IEEE 89
290 #define ALU_OP1_LOG_CLAMPED 90
291 #define ALU_OP1_LOG_IEEE 91
292 #define ALU_OP1_RECIP_CLAMPED 92
293 #define ALU_OP1_RECIP_FF 93
294 #define ALU_OP1_RECIP_IEEE 94
295 #define ALU_OP1_RECIPSQRT_CLAMPED 95
296 #define ALU_OP1_RECIPSQRT_FF 96
297 #define ALU_OP1_RECIPSQRT_IEEE 97
298 #define ALU_OP1_SQRT_IEEE 98
299 #define ALU_OP1_SIN 99
300 #define ALU_OP1_COS 100
301 #define ALU_OP2_MULLO_INT 101
302 #define ALU_OP2_MULHI_INT 102
303 #define ALU_OP2_MULLO_UINT 103
304 #define ALU_OP2_MULHI_UINT 104
305 #define ALU_OP1_RECIP_INT 105
306 #define ALU_OP1_RECIP_UINT 106
307 #define ALU_OP2_RECIP_64 107
308 #define ALU_OP2_RECIP_CLAMPED_64 108
309 #define ALU_OP2_RECIPSQRT_64 109
310 #define ALU_OP2_RECIPSQRT_CLAMPED_64 110
311 #define ALU_OP2_SQRT_64 111
312 #define ALU_OP1_FLT_TO_UINT 112
313 #define ALU_OP1_INT_TO_FLT 113
314 #define ALU_OP1_UINT_TO_FLT 114
315 #define ALU_OP2_BFM_INT 115
316 #define ALU_OP1_FLT32_TO_FLT16 116
317 #define ALU_OP1_FLT16_TO_FLT32 117
318 #define ALU_OP1_UBYTE0_FLT 118
319 #define ALU_OP1_UBYTE1_FLT 119
320 #define ALU_OP1_UBYTE2_FLT 120
321 #define ALU_OP1_UBYTE3_FLT 121
322 #define ALU_OP1_BCNT_INT 122
323 #define ALU_OP1_FFBH_UINT 123
324 #define ALU_OP1_FFBL_INT 124
325 #define ALU_OP1_FFBH_INT 125
326 #define ALU_OP1_FLT_TO_UINT4 126
327 #define ALU_OP2_DOT_IEEE 127
328 #define ALU_OP1_FLT_TO_INT_RPI 128
329 #define ALU_OP1_FLT_TO_INT_FLOOR 129
330 #define ALU_OP2_MULHI_UINT24 130
331 #define ALU_OP1_MBCNT_32HI_INT 131
332 #define ALU_OP1_OFFSET_TO_FLT 132
333 #define ALU_OP2_MUL_UINT24 133
334 #define ALU_OP1_BCNT_ACCUM_PREV_INT 134
335 #define ALU_OP1_MBCNT_32LO_ACCUM_PREV_INT 135
336 #define ALU_OP2_SETE_64 136
337 #define ALU_OP2_SETNE_64 137
338 #define ALU_OP2_SETGT_64 138
339 #define ALU_OP2_SETGE_64 139
340 #define ALU_OP2_MIN_64 140
341 #define ALU_OP2_MAX_64 141
342 #define ALU_OP2_DOT4 142
343 #define ALU_OP2_DOT4_IEEE 143
344 #define ALU_OP2_CUBE 144
345 #define ALU_OP1_MAX4 145
346 #define ALU_OP1_FREXP_64 146
347 #define ALU_OP2_LDEXP_64 147
348 #define ALU_OP1_FRACT_64 148
349 #define ALU_OP2_PRED_SETGT_64 149
350 #define ALU_OP2_PRED_SETE_64 150
351 #define ALU_OP2_PRED_SETGE_64 151
352 #define ALU_OP2_MUL_64 152
353 #define ALU_OP2_ADD_64 153
354 #define ALU_OP1_MOVA_INT 154
355 #define ALU_OP1_FLT64_TO_FLT32 155
356 #define ALU_OP1_FLT32_TO_FLT64 156
357 #define ALU_OP2_SAD_ACCUM_PREV_UINT 157
358 #define ALU_OP2_DOT 158
359 #define ALU_OP1_MUL_PREV 159
360 #define ALU_OP1_MUL_IEEE_PREV 160
361 #define ALU_OP1_ADD_PREV 161
362 #define ALU_OP2_MULADD_PREV 162
363 #define ALU_OP2_MULADD_IEEE_PREV 163
364 #define ALU_OP2_INTERP_XY 164
365 #define ALU_OP2_INTERP_ZW 165
366 #define ALU_OP2_INTERP_X 166
367 #define ALU_OP2_INTERP_Z 167
368 #define ALU_OP1_STORE_FLAGS 168
369 #define ALU_OP1_LOAD_STORE_FLAGS 169
370 #define ALU_OP2_LDS_1A 170
371 #define ALU_OP2_LDS_1A1D 171
372 #define ALU_OP2_LDS_2A 172
373 #define ALU_OP1_INTERP_LOAD_P0 173
374 #define ALU_OP1_INTERP_LOAD_P10 174
375 #define ALU_OP1_INTERP_LOAD_P20 175
376 #define ALU_OP3_BFE_UINT 176
377 #define ALU_OP3_BFE_INT 177
378 #define ALU_OP3_BFI_INT 178
379 #define ALU_OP3_FMA 179
380 #define ALU_OP3_MULADD_INT24 180
381 #define ALU_OP3_CNDNE_64 181
382 #define ALU_OP3_FMA_64 182
383 #define ALU_OP3_LERP_UINT 183
384 #define ALU_OP3_BIT_ALIGN_INT 184
385 #define ALU_OP3_BYTE_ALIGN_INT 185
386 #define ALU_OP3_SAD_ACCUM_UINT 186
387 #define ALU_OP3_SAD_ACCUM_HI_UINT 187
388 #define ALU_OP3_MULADD_UINT24 188
389 #define ALU_OP3_LDS_IDX_OP 189
390 #define ALU_OP3_MULADD 190
391 #define ALU_OP3_MULADD_M2 191
392 #define ALU_OP3_MULADD_M4 192
393 #define ALU_OP3_MULADD_D2 193
394 #define ALU_OP3_MULADD_IEEE 194
395 #define ALU_OP3_CNDE 195
396 #define ALU_OP3_CNDGT 196
397 #define ALU_OP3_CNDGE 197
398 #define ALU_OP3_CNDE_INT 198
399 #define ALU_OP3_CNDGT_INT 199
400 #define ALU_OP3_CNDGE_INT 200
401 #define ALU_OP3_MUL_LIT 201
402 #define ALU_OP1_MOVA 202
403 #define ALU_OP1_MOVA_FLOOR 203
404 #define ALU_OP1_MOVA_GPR_INT 204
405 #define ALU_OP3_MULADD_64 205
406 #define ALU_OP3_MULADD_64_M2 206
407 #define ALU_OP3_MULADD_64_M4 207
408 #define ALU_OP3_MULADD_64_D2 208
409 #define ALU_OP3_MUL_LIT_M2 209
410 #define ALU_OP3_MUL_LIT_M4 210
411 #define ALU_OP3_MUL_LIT_D2 211
412 #define ALU_OP3_MULADD_IEEE_M2 212
413 #define ALU_OP3_MULADD_IEEE_M4 213
414 #define ALU_OP3_MULADD_IEEE_D2 214
415
416 #define LDS_OP2_LDS_ADD 215
417 #define LDS_OP2_LDS_SUB 216
418 #define LDS_OP2_LDS_RSUB 217
419 #define LDS_OP2_LDS_INC 218
420 #define LDS_OP2_LDS_DEC 219
421 #define LDS_OP2_LDS_MIN_INT 220
422 #define LDS_OP2_LDS_MAX_INT 221
423 #define LDS_OP2_LDS_MIN_UINT 222
424 #define LDS_OP2_LDS_MAX_UINT 223
425 #define LDS_OP2_LDS_AND 224
426 #define LDS_OP2_LDS_OR 225
427 #define LDS_OP2_LDS_XOR 226
428 #define LDS_OP3_LDS_MSKOR 227
429 #define LDS_OP2_LDS_WRITE 228
430 #define LDS_OP3_LDS_WRITE_REL 229
431 #define LDS_OP3_LDS_WRITE2 230
432 #define LDS_OP3_LDS_CMP_STORE 231
433 #define LDS_OP3_LDS_CMP_STORE_SPF 232
434 #define LDS_OP2_LDS_BYTE_WRITE 233
435 #define LDS_OP2_LDS_SHORT_WRITE 234
436 #define LDS_OP2_LDS_ADD_RET 235
437 #define LDS_OP2_LDS_SUB_RET 236
438 #define LDS_OP2_LDS_RSUB_RET 237
439 #define LDS_OP2_LDS_INC_RET 238
440 #define LDS_OP2_LDS_DEC_RET 239
441 #define LDS_OP2_LDS_MIN_INT_RET 240
442 #define LDS_OP2_LDS_MAX_INT_RET 241
443 #define LDS_OP2_LDS_MIN_UINT_RET 242
444 #define LDS_OP2_LDS_MAX_UINT_RET 243
445 #define LDS_OP2_LDS_AND_RET 244
446 #define LDS_OP2_LDS_OR_RET 245
447 #define LDS_OP2_LDS_XOR_RET 246
448 #define LDS_OP3_LDS_MSKOR_RET 247
449 #define LDS_OP2_LDS_XCHG_RET 248
450 #define LDS_OP3_LDS_XCHG_REL_RET 249
451 #define LDS_OP3_LDS_XCHG2_RET 250
452 #define LDS_OP3_LDS_CMP_XCHG_RET 251
453 #define LDS_OP3_LDS_CMP_XCHG_SPF_RET 252
454 #define LDS_OP1_LDS_READ_RET 253
455 #define LDS_OP1_LDS_READ_REL_RET 254
456 #define LDS_OP2_LDS_READ2_RET 255
457 #define LDS_OP3_LDS_READWRITE_RET 256
458 #define LDS_OP1_LDS_BYTE_READ_RET 257
459 #define LDS_OP1_LDS_UBYTE_READ_RET 258
460 #define LDS_OP1_LDS_SHORT_READ_RET 259
461 #define LDS_OP1_LDS_USHORT_READ_RET 260
462
463 #define FETCH_OP_VFETCH 0
464 #define FETCH_OP_SEMFETCH 1
465 #define FETCH_OP_READ_SCRATCH 2
466 #define FETCH_OP_READ_REDUCT 3
467 #define FETCH_OP_READ_MEM 4
468 #define FETCH_OP_DS_LOCAL_WRITE 5
469 #define FETCH_OP_DS_LOCAL_READ 6
470 #define FETCH_OP_GDS_ADD 7
471 #define FETCH_OP_GDS_SUB 8
472 #define FETCH_OP_GDS_RSUB 9
473 #define FETCH_OP_GDS_INC 10
474 #define FETCH_OP_GDS_DEC 11
475 #define FETCH_OP_GDS_MIN_INT 12
476 #define FETCH_OP_GDS_MAX_INT 13
477 #define FETCH_OP_GDS_MIN_UINT 14
478 #define FETCH_OP_GDS_MAX_UINT 15
479 #define FETCH_OP_GDS_AND 16
480 #define FETCH_OP_GDS_OR 17
481 #define FETCH_OP_GDS_XOR 18
482 #define FETCH_OP_GDS_MSKOR 19
483 #define FETCH_OP_GDS_WRITE 20
484 #define FETCH_OP_GDS_WRITE_REL 21
485 #define FETCH_OP_GDS_WRITE2 22
486 #define FETCH_OP_GDS_CMP_STORE 23
487 #define FETCH_OP_GDS_CMP_STORE_SPF 24
488 #define FETCH_OP_GDS_BYTE_WRITE 25
489 #define FETCH_OP_GDS_SHORT_WRITE 26
490 #define FETCH_OP_GDS_ADD_RET 27
491 #define FETCH_OP_GDS_SUB_RET 28
492 #define FETCH_OP_GDS_RSUB_RET 29
493 #define FETCH_OP_GDS_INC_RET 30
494 #define FETCH_OP_GDS_DEC_RET 31
495 #define FETCH_OP_GDS_MIN_INT_RET 32
496 #define FETCH_OP_GDS_MAX_INT_RET 33
497 #define FETCH_OP_GDS_MIN_UINT_RET 34
498 #define FETCH_OP_GDS_MAX_UINT_RET 35
499 #define FETCH_OP_GDS_AND_RET 36
500 #define FETCH_OP_GDS_OR_RET 37
501 #define FETCH_OP_GDS_XOR_RET 38
502 #define FETCH_OP_GDS_MSKOR_RET 39
503 #define FETCH_OP_GDS_XCHG_RET 40
504 #define FETCH_OP_GDS_XCHG_REL_RET 41
505 #define FETCH_OP_GDS_XCHG2_RET 42
506 #define FETCH_OP_GDS_CMP_XCHG_RET 43
507 #define FETCH_OP_GDS_CMP_XCHG_SPF_RET 44
508 #define FETCH_OP_GDS_READ_RET 45
509 #define FETCH_OP_GDS_READ_REL_RET 46
510 #define FETCH_OP_GDS_READ2_RET 47
511 #define FETCH_OP_GDS_READWRITE_RET 48
512 #define FETCH_OP_GDS_BYTE_READ_RET 49
513 #define FETCH_OP_GDS_UBYTE_READ_RET 50
514 #define FETCH_OP_GDS_SHORT_READ_RET 51
515 #define FETCH_OP_GDS_USHORT_READ_RET 52
516 #define FETCH_OP_GDS_ATOMIC_ORDERED_ALLOC 53
517 #define FETCH_OP_TF_WRITE 54
518 #define FETCH_OP_DS_GLOBAL_WRITE 55
519 #define FETCH_OP_DS_GLOBAL_READ 56
520 #define FETCH_OP_LD 57
521 #define FETCH_OP_LDFPTR 58
522 #define FETCH_OP_GET_TEXTURE_RESINFO 59
523 #define FETCH_OP_GET_NUMBER_OF_SAMPLES 60
524 #define FETCH_OP_GET_LOD 61
525 #define FETCH_OP_GET_GRADIENTS_H 62
526 #define FETCH_OP_GET_GRADIENTS_V 63
527 #define FETCH_OP_GET_GRADIENTS_H_FINE 64
528 #define FETCH_OP_GET_GRADIENTS_V_FINE 65
529 #define FETCH_OP_GET_LERP 66
530 #define FETCH_OP_SET_TEXTURE_OFFSETS 67
531 #define FETCH_OP_KEEP_GRADIENTS 68
532 #define FETCH_OP_SET_GRADIENTS_H 69
533 #define FETCH_OP_SET_GRADIENTS_V 70
534 #define FETCH_OP_SET_GRADIENTS_H_COARSE 71
535 #define FETCH_OP_SET_GRADIENTS_V_COARSE 72
536 #define FETCH_OP_SET_GRADIENTS_H_PACKED_FINE 73
537 #define FETCH_OP_SET_GRADIENTS_V_PACKED_FINE 74
538 #define FETCH_OP_SET_GRADIENTS_H_PACKED_COARSE 75
539 #define FETCH_OP_SET_GRADIENTS_V_PACKED_COARSE 76
540 #define FETCH_OP_PASS 77
541 #define FETCH_OP_PASS1 78
542 #define FETCH_OP_PASS2 79
543 #define FETCH_OP_PASS3 80
544 #define FETCH_OP_SET_CUBEMAP_INDEX 81
545 #define FETCH_OP_GET_BUFFER_RESINFO 82
546 #define FETCH_OP_FETCH4 83
547 #define FETCH_OP_SAMPLE 84
548 #define FETCH_OP_SAMPLE_L 85
549 #define FETCH_OP_SAMPLE_LB 86
550 #define FETCH_OP_SAMPLE_LZ 87
551 #define FETCH_OP_SAMPLE_G 88
552 #define FETCH_OP_SAMPLE_G_L 89
553 #define FETCH_OP_GATHER4 90
554 #define FETCH_OP_SAMPLE_G_LB 91
555 #define FETCH_OP_SAMPLE_G_LZ 92
556 #define FETCH_OP_GATHER4_O 93
557 #define FETCH_OP_SAMPLE_C 94
558 #define FETCH_OP_SAMPLE_C_L 95
559 #define FETCH_OP_SAMPLE_C_LB 96
560 #define FETCH_OP_SAMPLE_C_LZ 97
561 #define FETCH_OP_SAMPLE_C_G 98
562 #define FETCH_OP_SAMPLE_C_G_L 99
563 #define FETCH_OP_GATHER4_C 100
564 #define FETCH_OP_SAMPLE_C_G_LB 101
565 #define FETCH_OP_SAMPLE_C_G_LZ 102
566 #define FETCH_OP_GATHER4_C_O 103
567
568 #define CF_OP_NOP 0
569 #define CF_OP_TEX 1
570 #define CF_OP_VTX 2
571 #define CF_OP_VTX_TC 3
572 #define CF_OP_GDS 4
573 #define CF_OP_LOOP_START 5
574 #define CF_OP_LOOP_END 6
575 #define CF_OP_LOOP_START_DX10 7
576 #define CF_OP_LOOP_START_NO_AL 8
577 #define CF_OP_LOOP_CONTINUE 9
578 #define CF_OP_LOOP_BREAK 10
579 #define CF_OP_JUMP 11
580 #define CF_OP_PUSH 12
581 #define CF_OP_PUSH_ELSE 13
582 #define CF_OP_ELSE 14
583 #define CF_OP_POP 15
584 #define CF_OP_POP_JUMP 16
585 #define CF_OP_POP_PUSH 17
586 #define CF_OP_POP_PUSH_ELSE 18
587 #define CF_OP_CALL 19
588 #define CF_OP_CALL_FS 20
589 #define CF_OP_RET 21
590 #define CF_OP_EMIT_VERTEX 22
591 #define CF_OP_EMIT_CUT_VERTEX 23
592 #define CF_OP_CUT_VERTEX 24
593 #define CF_OP_KILL 25
594 #define CF_OP_END_PROGRAM 26
595 #define CF_OP_WAIT_ACK 27
596 #define CF_OP_TEX_ACK 28
597 #define CF_OP_VTX_ACK 29
598 #define CF_OP_VTX_TC_ACK 30
599 #define CF_OP_JUMPTABLE 31
600 #define CF_OP_WAVE_SYNC 32
601 #define CF_OP_HALT 33
602 #define CF_OP_CF_END 34
603 #define CF_OP_LDS_DEALLOC 35
604 #define CF_OP_PUSH_WQM 36
605 #define CF_OP_POP_WQM 37
606 #define CF_OP_ELSE_WQM 38
607 #define CF_OP_JUMP_ANY 39
608 #define CF_OP_REACTIVATE 40
609 #define CF_OP_REACTIVATE_WQM 41
610 #define CF_OP_INTERRUPT 42
611 #define CF_OP_INTERRUPT_AND_SLEEP 43
612 #define CF_OP_SET_PRIORITY 44
613 #define CF_OP_MEM_STREAM0_BUF0 45
614 #define CF_OP_MEM_STREAM0_BUF1 46
615 #define CF_OP_MEM_STREAM0_BUF2 47
616 #define CF_OP_MEM_STREAM0_BUF3 48
617 #define CF_OP_MEM_STREAM1_BUF0 49
618 #define CF_OP_MEM_STREAM1_BUF1 50
619 #define CF_OP_MEM_STREAM1_BUF2 51
620 #define CF_OP_MEM_STREAM1_BUF3 52
621 #define CF_OP_MEM_STREAM2_BUF0 53
622 #define CF_OP_MEM_STREAM2_BUF1 54
623 #define CF_OP_MEM_STREAM2_BUF2 55
624 #define CF_OP_MEM_STREAM2_BUF3 56
625 #define CF_OP_MEM_STREAM3_BUF0 57
626 #define CF_OP_MEM_STREAM3_BUF1 58
627 #define CF_OP_MEM_STREAM3_BUF2 59
628 #define CF_OP_MEM_STREAM3_BUF3 60
629 #define CF_OP_MEM_STREAM0 61
630 #define CF_OP_MEM_STREAM1 62
631 #define CF_OP_MEM_STREAM2 63
632 #define CF_OP_MEM_STREAM3 64
633 #define CF_OP_MEM_SCRATCH 65
634 #define CF_OP_MEM_REDUCT 66
635 #define CF_OP_MEM_RING 67
636 #define CF_OP_EXPORT 68
637 #define CF_OP_EXPORT_DONE 69
638 #define CF_OP_MEM_EXPORT 70
639 #define CF_OP_MEM_RAT 71
640 #define CF_OP_MEM_RAT_NOCACHE 72
641 #define CF_OP_MEM_RING1 73
642 #define CF_OP_MEM_RING2 74
643 #define CF_OP_MEM_RING3 75
644 #define CF_OP_MEM_MEM_COMBINED 76
645 #define CF_OP_MEM_RAT_COMBINED_NOCACHE 77
646 #define CF_OP_MEM_RAT_COMBINED 78
647 #define CF_OP_EXPORT_DONE_END 79
648 #define CF_OP_ALU 80
649 #define CF_OP_ALU_PUSH_BEFORE 81
650 #define CF_OP_ALU_POP_AFTER 82
651 #define CF_OP_ALU_POP2_AFTER 83
652 #define CF_OP_ALU_EXT 84
653 #define CF_OP_ALU_CONTINUE 85
654 #define CF_OP_ALU_BREAK 86
655 #define CF_OP_ALU_VALID_PIXEL_MODE 87
656 #define CF_OP_ALU_ELSE_AFTER 88
657
658 /* CF_NATIVE means that r600_bytecode_cf contains pre-encoded native data */
659 #define CF_NATIVE 89
660
661 enum r600_chip_class {
662 ISA_CC_R600,
663 ISA_CC_R700,
664 ISA_CC_EVERGREEN,
665 ISA_CC_CAYMAN
666 };
667
668 struct r600_isa {
669 enum r600_chip_class hw_class;
670
671 /* these arrays provide reverse mapping - opcode => table_index,
672 * typically we don't need such lookup, unless we are decoding the native
673 * bytecode (e.g. when reading the bytestream from llvm backend) */
674 unsigned *alu_op2_map;
675 unsigned *alu_op3_map;
676 unsigned *fetch_map;
677 unsigned *cf_map;
678 };
679
680 struct r600_context;
681
682 int r600_isa_init(struct r600_context *ctx, struct r600_isa *isa);
683 int r600_isa_destroy(struct r600_isa *isa);
684
685 extern const struct alu_op_info r600_alu_op_table[];
686
687 unsigned
688 r600_alu_op_table_size(void);
689
690 const struct alu_op_info *
691 r600_isa_alu(unsigned op);
692
693 const struct fetch_op_info *
694 r600_isa_fetch(unsigned op);
695
696 const struct cf_op_info *
697 r600_isa_cf(unsigned op);
698
699 static inline unsigned
r600_isa_alu_opcode(enum r600_chip_class chip_class,unsigned op)700 r600_isa_alu_opcode(enum r600_chip_class chip_class, unsigned op) {
701 int opc = r600_isa_alu(op)->opcode[chip_class >> 1];
702 assert(opc != -1);
703 return opc;
704 }
705
706 static inline unsigned
r600_isa_alu_slots(enum r600_chip_class chip_class,unsigned op)707 r600_isa_alu_slots(enum r600_chip_class chip_class, unsigned op) {
708 unsigned slots = r600_isa_alu(op)->slots[chip_class];
709 assert(slots != 0);
710 return slots;
711 }
712
713 static inline unsigned
r600_isa_fetch_opcode(enum r600_chip_class chip_class,unsigned op)714 r600_isa_fetch_opcode(enum r600_chip_class chip_class, unsigned op) {
715 int opc = r600_isa_fetch(op)->opcode[chip_class];
716 assert(opc != -1);
717 return opc;
718 }
719
720 static inline unsigned
r600_isa_cf_opcode(enum r600_chip_class chip_class,unsigned op)721 r600_isa_cf_opcode(enum r600_chip_class chip_class, unsigned op) {
722 int opc = r600_isa_cf(op)->opcode[chip_class];
723 assert(opc != -1);
724 return opc;
725 }
726
727 static inline unsigned
r600_isa_alu_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_op3)728 r600_isa_alu_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_op3) {
729 unsigned op;
730 if (is_op3) {
731 assert(isa->alu_op3_map);
732 op = isa->alu_op3_map[opcode];
733 } else {
734 assert(isa->alu_op2_map);
735 op = isa->alu_op2_map[opcode];
736 }
737 assert(op);
738 return op - 1;
739 }
740
741 static inline unsigned
r600_isa_fetch_by_opcode(struct r600_isa * isa,unsigned opcode)742 r600_isa_fetch_by_opcode(struct r600_isa* isa, unsigned opcode) {
743 unsigned op;
744 assert(isa->fetch_map);
745 op = isa->fetch_map[opcode];
746 assert(op);
747 return op - 1;
748 }
749
750 static inline unsigned
r600_isa_cf_by_opcode(struct r600_isa * isa,unsigned opcode,unsigned is_alu)751 r600_isa_cf_by_opcode(struct r600_isa* isa, unsigned opcode, unsigned is_alu) {
752 unsigned op;
753 assert(isa->cf_map);
754 /* using offset for CF_ALU_xxx opcodes because they overlap with other
755 * CF opcodes (they use different encoding in hw) */
756 op = isa->cf_map[is_alu ? opcode + 0x80 : opcode];
757 assert(op);
758 return op - 1;
759 }
760
761 #ifdef __cplusplus
762 } /* extern "C" */
763 #endif
764
765 #endif /* R600_ISA_H_ */
766