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Searched refs:ARMSubtarget (Results 1 – 25 of 59) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMSubtarget.cpp80 ARMSubtarget &ARMSubtarget::initializeSubtargetDependencies(StringRef CPU, in initializeSubtargetDependencies()
87 ARMFrameLowering *ARMSubtarget::initializeFrameLowering(StringRef CPU, in initializeFrameLowering()
89 ARMSubtarget &STI = initializeSubtargetDependencies(CPU, FS); in initializeFrameLowering()
96 ARMSubtarget::ARMSubtarget(const Triple &TT, const std::string &CPU, in ARMSubtarget() function in ARMSubtarget
127 const CallLowering *ARMSubtarget::getCallLowering() const { in getCallLowering()
131 InstructionSelector *ARMSubtarget::getInstructionSelector() const { in getInstructionSelector()
135 const LegalizerInfo *ARMSubtarget::getLegalizerInfo() const { in getLegalizerInfo()
139 const RegisterBankInfo *ARMSubtarget::getRegBankInfo() const { in getRegBankInfo()
143 bool ARMSubtarget::isXRaySupported() const { in isXRaySupported()
148 void ARMSubtarget::initializeEnvironment() { in initializeEnvironment()
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DThumbRegisterInfo.cpp45 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getLargestLegalSuperClass()
56 if (!MF.getSubtarget<ARMSubtarget>().isThumb1Only()) in getPointerRegClass()
68 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitThumb1LoadConstPool()
108 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in emitLoadConstPool()
130 const ARMSubtarget &ST = MF.getSubtarget<ARMSubtarget>(); in emitThumbRegPlusImmInReg()
365 assert(MBB.getParent()->getSubtarget<ARMSubtarget>().isThumb1Only() && in rewriteFrameIndex()
433 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in resolveFrameIndex()
456 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in eliminateFrameIndex()
568 if (MF.getSubtarget<ARMSubtarget>().isThumb1Only()) { in useFPForScavengingIndex()
DARMBaseRegisterInfo.cpp60 static unsigned getFramePointerReg(const ARMSubtarget &STI) { in getFramePointerReg()
66 const ARMSubtarget &STI = MF->getSubtarget<ARMSubtarget>(); in getCalleeSavedRegs()
124 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getCallPreservedMask()
147 assert(MF.getSubtarget<ARMSubtarget>().isTargetDarwin() && in getTLSCallPreservedMask()
154 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getSjLjDispatchPreservedMask()
164 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getThisReturnPreservedMask()
188 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getReservedRegs()
242 if (MF.getSubtarget<ARMSubtarget>().hasNEON()) in getLargestLegalSuperClass()
266 const ARMSubtarget &STI = MF.getSubtarget<ARMSubtarget>(); in getRegPressureLimit()
426 if (!MRI->canReserveReg(getFramePointerReg(MF.getSubtarget<ARMSubtarget>()))) in canRealignStack()
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DARMTargetMachine.cpp251 const ARMSubtarget *
287 I = std::make_unique<ARMSubtarget>(TargetTriple, CPU, FS, *this, isLittle, in getSubtargetImpl()
335 const ARMSubtarget &ST = C->MF->getSubtarget<ARMSubtarget>(); in createMachineScheduler()
345 const ARMSubtarget &ST = C->MF->getSubtarget<ARMSubtarget>(); in createPostMachineScheduler()
404 const auto &ST = this->TM->getSubtarget<ARMSubtarget>(F); in addIRPasses()
512 return this->TM->getSubtarget<ARMSubtarget>(F).restrictIT(); in addPreSched2()
516 return !MF.getSubtarget<ARMSubtarget>().isThumb1Only(); in addPreSched2()
535 return MF.getSubtarget<ARMSubtarget>().isThumb2(); in addPreEmitPass()
DARMMachineFunctionInfo.cpp17 : isThumb(MF.getSubtarget<ARMSubtarget>().isThumb()), in ARMFunctionInfo()
18 hasThumb2(MF.getSubtarget<ARMSubtarget>().hasThumb2()) {} in ARMFunctionInfo()
DARMTargetMachine.h39 mutable StringMap<std::unique_ptr<ARMSubtarget>> SubtargetMap;
48 const ARMSubtarget *getSubtargetImpl(const Function &F) const override;
52 const ARMSubtarget *getSubtargetImpl() const = delete;
DARMFrameLowering.h18 class ARMSubtarget; variable
24 const ARMSubtarget &STI;
27 explicit ARMFrameLowering(const ARMSubtarget &sti);
DARMInstrInfo.h20 class ARMSubtarget; variable
25 explicit ARMInstrInfo(const ARMSubtarget &STI);
DARMLegalizerInfo.h24 class ARMSubtarget; variable
29 ARMLegalizerInfo(const ARMSubtarget &ST);
DARMMacroFusion.cpp55 const ARMSubtarget &ST = static_cast<const ARMSubtarget&>(TSI); in shouldScheduleAdjacent()
DARMBaseInstrInfo.h33 class ARMSubtarget; variable
36 const ARMSubtarget &Subtarget;
40 explicit ARMBaseInstrInfo(const ARMSubtarget &STI);
121 const ARMSubtarget &getSubtarget() const { return Subtarget; } in getSubtarget()
199 const ARMSubtarget &Subtarget) const;
202 const ARMSubtarget &Subtarget) const;
708 bool tryFoldSPUpdateIntoPushPop(const ARMSubtarget &Subtarget,
746 const ARMSubtarget *Subtarget,
753 const ARMSubtarget *Subtarget,
DThumb1InstrInfo.h20 class ARMSubtarget; variable
25 explicit Thumb1InstrInfo(const ARMSubtarget &STI);
DThumb1FrameLowering.h16 class ARMSubtarget; variable
21 explicit Thumb1FrameLowering(const ARMSubtarget &sti);
DARMInstrInfo.cpp31 ARMInstrInfo::ARMInstrInfo(const ARMSubtarget &STI) in ARMInstrInfo()
94 const ARMSubtarget &Subtarget = MF.getSubtarget<ARMSubtarget>(); in expandLoadStackGuard()
DARM.h27 class ARMSubtarget; variable
54 createARMInstructionSelector(const ARMBaseTargetMachine &TM, const ARMSubtarget &STI,
DThumb2InstrInfo.h20 class ARMSubtarget; variable
26 explicit Thumb2InstrInfo(const ARMSubtarget &STI);
DARMSelectionDAGInfo.cpp26 const ARMSubtarget &Subtarget = in EmitSpecializedLibcall()
27 DAG.getMachineFunction().getSubtarget<ARMSubtarget>(); in EmitSpecializedLibcall()
131 const ARMSubtarget &Subtarget = in EmitTargetCodeForMemcpy()
132 DAG.getMachineFunction().getSubtarget<ARMSubtarget>(); in EmitTargetCodeForMemcpy()
DThumb1InstrInfo.cpp22 Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI) in Thumb1InstrInfo()
44 const ARMSubtarget &st = MF.getSubtarget<ARMSubtarget>(); in copyPhysReg()
DARMISelLowering.h37 class ARMSubtarget; variable
301 const ARMSubtarget &STI);
475 const ARMSubtarget* getSubtarget() const { in getSubtarget()
641 const ARMSubtarget *Subtarget;
685 const ARMSubtarget *Subtarget) const;
687 const ARMSubtarget *Subtarget) const;
717 const ARMSubtarget *ST) const;
719 const ARMSubtarget *ST) const;
DARMRegisterInfo.td233 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
245 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
256 return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only();
269 return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only();
277 return 1 + MF.getSubtarget<ARMSubtarget>().isThumb1Only();
303 return MF.getSubtarget<ARMSubtarget>().getGPRAllocationOrder(MF);
330 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
337 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
346 return MF.getSubtarget<ARMSubtarget>().isThumb1Only();
377 return 1 + MF.getSubtarget<ARMSubtarget>().useStride4VFPs();
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DMVEVPTBlockPass.cpp179 const ARMSubtarget &STI = in runOnMachineFunction()
180 static_cast<const ARMSubtarget &>(Fn.getSubtarget()); in runOnMachineFunction()
DARMRegisterInfo.h20 class ARMSubtarget; variable
DARMCallLowering.cpp162 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle(); in assignCustomValue()
270 auto const &ST = MIRBuilder.getMF().getSubtarget<ARMSubtarget>(); in lowerReturn()
388 bool IsLittle = MIRBuilder.getMF().getSubtarget<ARMSubtarget>().isLittle(); in assignCustomValue()
486 unsigned getCallOpcode(const ARMSubtarget &STI, bool isDirect) { in getCallOpcode()
507 const auto &STI = MF.getSubtarget<ARMSubtarget>(); in lowerCall()
DARMHazardRecognizer.h22 class ARMSubtarget; variable
DThumbRegisterInfo.h22 class ARMSubtarget; variable

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