/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMAddressingModes.h | 86 inline unsigned rotr32(unsigned Val, unsigned Amt) { in rotr32() argument 87 assert(Amt < 32 && "Invalid rotate amount"); in rotr32() 88 return (Val >> Amt) | (Val << ((32-Amt)&31)); in rotr32() 93 inline unsigned rotl32(unsigned Val, unsigned Amt) { in rotl32() argument 94 assert(Amt < 32 && "Invalid rotate amount"); in rotl32() 95 return (Val << Amt) | (Val >> ((32-Amt)&31)); in rotl32()
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D | ARMInstPrinter.cpp | 776 unsigned Amt = ShiftOp & 0x1f; in printShiftImmOperand() local 778 O << ", asr " << markup("<imm:") << "#" << (Amt == 0 ? 32 : Amt) in printShiftImmOperand() 780 } else if (Amt) { in printShiftImmOperand() 781 O << ", lsl " << markup("<imm:") << "#" << Amt << markup(">"); in printShiftImmOperand()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/ADT/ |
D | APSInt.h | 141 APSInt operator>>(unsigned Amt) const { 142 return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false); 144 APSInt& operator>>=(unsigned Amt) { 146 lshrInPlace(Amt); 148 ashrInPlace(Amt); 201 APSInt& operator<<=(unsigned Amt) { 202 static_cast<APInt&>(*this) <<= Amt;
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D | APInt.h | 1121 APInt sshl_ov(const APInt &Amt, bool &Overflow) const; 1122 APInt ushl_ov(const APInt &Amt, bool &Overflow) const;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/InstCombine/ |
D | InstCombineCasts.cpp | 128 Value *Amt = nullptr; in PromoteCastOfAllocation() local 130 Amt = NumElements; in PromoteCastOfAllocation() 132 Amt = ConstantInt::get(AI.getArraySize()->getType(), Scale); in PromoteCastOfAllocation() 134 Amt = AllocaBuilder.CreateMul(Amt, NumElements); in PromoteCastOfAllocation() 140 Amt = AllocaBuilder.CreateAdd(Amt, Off); in PromoteCastOfAllocation() 143 AllocaInst *New = AllocaBuilder.CreateAlloca(CastElTy, Amt); in PromoteCastOfAllocation() 379 const APInt *Amt; in canEvaluateTruncated() local 380 if (match(I->getOperand(1), m_APInt(Amt))) { in canEvaluateTruncated() 382 if (Amt->getLimitedValue(BitWidth) < BitWidth) in canEvaluateTruncated() 391 const APInt *Amt; in canEvaluateTruncated() local [all …]
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D | InstCombineSimplifyDemanded.cpp | 978 Constant *Amt = ConstantInt::get(VarX->getType(), ShlAmt - ShrAmt); in simplifyShrShlDemandedBits() local 979 New = BinaryOperator::CreateShl(VarX, Amt); in simplifyShrShlDemandedBits() 984 Constant *Amt = ConstantInt::get(VarX->getType(), ShrAmt - ShlAmt); in simplifyShrShlDemandedBits() local 985 New = isLshr ? BinaryOperator::CreateLShr(VarX, Amt) : in simplifyShrShlDemandedBits() 986 BinaryOperator::CreateAShr(VarX, Amt); in simplifyShrShlDemandedBits()
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D | InstructionCombining.cpp | 1303 int32_t Amt = cast<ConstantInt>(BO->getOperand(1))-> in Descale() local 1307 if (Amt == logScale) { in Descale() 1313 if (Amt < logScale || !Op->hasOneUse()) in Descale() 1319 Op = ConstantInt::get(BO->getType(), Amt - logScale); in Descale()
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D | InstCombineCompares.cpp | 2148 unsigned Amt = ShiftAmt->getLimitedValue(TypeBits - 1); in foldICmpShlConstant() local 2149 if (Shl->hasOneUse() && Amt != 0 && C.countTrailingZeros() >= Amt && in foldICmpShlConstant() 2150 DL.isLegalInteger(TypeBits - Amt)) { in foldICmpShlConstant() 2151 Type *TruncTy = IntegerType::get(Cmp.getContext(), TypeBits - Amt); in foldICmpShlConstant() 2155 ConstantInt::get(TruncTy, C.ashr(*ShiftAmt).trunc(TypeBits - Amt)); in foldICmpShlConstant()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
D | ARCFrameLowering.cpp | 476 unsigned Amt = Old.getOperand(0).getImm(); in eliminateCallFramePseudoInstr() local 479 if (Amt > AFI->MaxCallStackReq && Old.getOpcode() == ARC::ADJCALLSTACKDOWN) in eliminateCallFramePseudoInstr() 480 AFI->MaxCallStackReq = Amt; in eliminateCallFramePseudoInstr() 482 if (Amt != 0) { in eliminateCallFramePseudoInstr() 487 emitRegUpdate(MBB, I, dl, ARC::SP, Amt, IsAdd, TII); in eliminateCallFramePseudoInstr()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/IR/ |
D | BasicBlock.h | 333 void AdjustBlockAddressRefCount(int Amt) { in AdjustBlockAddressRefCount() argument 334 setValueSubclassData(getSubclassDataFromValue()+Amt); in AdjustBlockAddressRefCount()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeIntegerTypes.cpp | 1951 void DAGTypeLegalizer::ExpandShiftByConstant(SDNode *N, const APInt &Amt, in ExpandShiftByConstant() argument 1960 if (!Amt) { in ExpandShiftByConstant() 1972 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant() 1974 } else if (Amt.ugt(NVTBits)) { in ExpandShiftByConstant() 1977 NVT, InL, DAG.getConstant(Amt - NVTBits, DL, ShTy)); in ExpandShiftByConstant() 1978 } else if (Amt == NVTBits) { in ExpandShiftByConstant() 1982 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, DL, ShTy)); in ExpandShiftByConstant() 1985 DAG.getConstant(Amt, DL, ShTy)), in ExpandShiftByConstant() 1987 DAG.getConstant(-Amt + NVTBits, DL, ShTy))); in ExpandShiftByConstant() 1993 if (Amt.ugt(VTBits)) { in ExpandShiftByConstant() [all …]
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D | TargetLowering.cpp | 1547 unsigned Amt = SA->getAPIntValue().urem(BitWidth); in SimplifyDemandedBits() local 1551 if (Amt == 0) { in SimplifyDemandedBits() 1560 APInt Demanded0 = DemandedBits.lshr(IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1561 APInt Demanded1 = DemandedBits << (IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1569 Known2.One <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1570 Known2.Zero <<= (IsFSHL ? Amt : (BitWidth - Amt)); in SimplifyDemandedBits() 1571 Known.One.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits() 1572 Known.Zero.lshrInPlace(IsFSHL ? (BitWidth - Amt) : Amt); in SimplifyDemandedBits()
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D | SelectionDAG.cpp | 2203 unsigned Amt = RHSC->getZExtValue(); in GetDemandedBits() local 2206 if (Amt >= DemandedBits.getBitWidth()) in GetDemandedBits() 2208 APInt SrcDemandedBits = DemandedBits << Amt; in GetDemandedBits() 2924 unsigned Amt = C->getAPIntValue().urem(BitWidth); in computeKnownBits() local 2928 if (Amt == 0) { in computeKnownBits() 2939 Known.One <<= Amt; in computeKnownBits() 2940 Known.Zero <<= Amt; in computeKnownBits() 2941 Known2.One.lshrInPlace(BitWidth - Amt); in computeKnownBits() 2942 Known2.Zero.lshrInPlace(BitWidth - Amt); in computeKnownBits() 2944 Known.One <<= BitWidth - Amt; in computeKnownBits() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/GlobalISel/ |
D | LegalizerHelper.cpp | 3085 LegalizerHelper::narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt, in narrowScalarShiftByConstant() argument 3092 if (Amt.isNullValue()) { in narrowScalarShiftByConstant() 3104 if (Amt.ugt(VTBits)) { in narrowScalarShiftByConstant() 3106 } else if (Amt.ugt(NVTBits)) { in narrowScalarShiftByConstant() 3109 MIRBuilder.buildConstant(AmtTy, Amt - NVTBits)); in narrowScalarShiftByConstant() 3110 } else if (Amt == NVTBits) { in narrowScalarShiftByConstant() 3114 Lo = MIRBuilder.buildShl(NVT, InL, MIRBuilder.buildConstant(AmtTy, Amt)); in narrowScalarShiftByConstant() 3116 MIRBuilder.buildShl(NVT, InH, MIRBuilder.buildConstant(AmtTy, Amt)); in narrowScalarShiftByConstant() 3118 NVT, InL, MIRBuilder.buildConstant(AmtTy, -Amt + NVTBits)); in narrowScalarShiftByConstant() 3122 if (Amt.ugt(VTBits)) { in narrowScalarShiftByConstant() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | BasicBlock.h | 437 void AdjustBlockAddressRefCount(int Amt) { in AdjustBlockAddressRefCount() argument 438 setValueSubclassData(getSubclassDataFromValue()+Amt); in AdjustBlockAddressRefCount()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/IR/ |
D | AutoUpgrade.cpp | 1138 Value *Amt = CI.getArgOperand(1); in upgradeX86Rotate() local 1143 if (Amt->getType() != Ty) { in upgradeX86Rotate() 1145 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); in upgradeX86Rotate() 1146 Amt = Builder.CreateVectorSplat(NumElts, Amt); in upgradeX86Rotate() 1151 Value *Res = Builder.CreateCall(Intrin, {Src, Src, Amt}); in upgradeX86Rotate() 1205 Value *Amt = CI.getArgOperand(2); in upgradeX86ConcatShift() local 1213 if (Amt->getType() != Ty) { in upgradeX86ConcatShift() 1215 Amt = Builder.CreateIntCast(Amt, Ty->getScalarType(), false); in upgradeX86ConcatShift() 1216 Amt = Builder.CreateVectorSplat(NumElts, Amt); in upgradeX86ConcatShift() 1221 Value *Res = Builder.CreateCall(Intrin, {Op0, Op1, Amt}); in upgradeX86ConcatShift()
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D | ConstantFold.cpp | 268 ConstantInt *Amt = dyn_cast<ConstantInt>(CE->getOperand(1)); in ExtractConstantBytes() local 269 if (!Amt) in ExtractConstantBytes() 271 APInt ShAmt = Amt->getValue(); in ExtractConstantBytes() 291 ConstantInt *Amt = dyn_cast<ConstantInt>(CE->getOperand(1)); in ExtractConstantBytes() local 292 if (!Amt) in ExtractConstantBytes() 294 APInt ShAmt = Amt->getValue(); in ExtractConstantBytes()
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D | Instructions.cpp | 1198 static Value *getAISize(LLVMContext &Context, Value *Amt) { in getAISize() argument 1199 if (!Amt) in getAISize() 1200 Amt = ConstantInt::get(Type::getInt32Ty(Context), 1); in getAISize() 1202 assert(!isa<BasicBlock>(Amt) && in getAISize() 1204 assert(Amt->getType()->isIntegerTy() && in getAISize() 1207 return Amt; in getAISize()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/GlobalISel/ |
D | LegalizerHelper.h | 213 LegalizeResult narrowScalarShiftByConstant(MachineInstr &MI, const APInt &Amt,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86ISelLowering.cpp | 18537 SDValue Amt = Op.getOperand(2); in LowerFunnelShift() local 18548 if (X86::isConstantSplat(Amt, APIntShiftAmt)) { in LowerFunnelShift() 18555 Op0, Op1, Amt); in LowerFunnelShift() 18571 Amt = DAG.getNode(ISD::AND, DL, Amt.getValueType(), Amt, in LowerFunnelShift() 18572 DAG.getConstant(15, DL, Amt.getValueType())); in LowerFunnelShift() 18575 return DAG.getNode(SHDOp, DL, VT, Op0, Op1, Amt); in LowerFunnelShift() 26350 SDValue Amt = Op.getOperand(1); in LowerScalarImmediateShift() local 26394 if (!X86::isConstantSplat(Amt, APIntShiftAmt)) in LowerScalarImmediateShift() 26456 SDValue Res = DAG.getNode(ISD::SRL, dl, VT, R, Amt); in LowerScalarImmediateShift() 26474 SDValue Amt = Op.getOperand(1); in LowerScalarVariableShift() local [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-subzero/include/llvm/ADT/ |
D | APInt.h | 937 APInt sshl_ov(const APInt &Amt, bool &Overflow) const; 938 APInt ushl_ov(const APInt &Amt, bool &Overflow) const;
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMBaseInstrInfo.cpp | 184 unsigned Amt = ARM_AM::getAM2Offset(OffImm); in convertToThreeAddress() local 186 if (ARM_AM::getSOImmVal(Amt) == -1) in convertToThreeAddress() 193 .addImm(Amt) in convertToThreeAddress() 196 } else if (Amt != 0) { in convertToThreeAddress() 198 unsigned SOOpc = ARM_AM::getSORegOpc(ShOpc, Amt); in convertToThreeAddress() 218 unsigned Amt = ARM_AM::getAM3Offset(OffImm); in convertToThreeAddress() local 224 .addImm(Amt) in convertToThreeAddress() 601 unsigned Amt = ARM_AM::getAM2Offset(OffImm); in isLdstScaledRegNotPlusLsl2() local 604 bool SimpleScaled = (isAdd && ShiftOpc == ARM_AM::lsl && Amt == 2); in isLdstScaledRegNotPlusLsl2()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCISelLowering.cpp | 8370 SDValue Amt = Op.getOperand(2); in LowerSHL_PARTS() local 8371 EVT AmtVT = Amt.getValueType(); in LowerSHL_PARTS() 8374 DAG.getConstant(BitWidth, dl, AmtVT), Amt); in LowerSHL_PARTS() 8375 SDValue Tmp2 = DAG.getNode(PPCISD::SHL, dl, VT, Hi, Amt); in LowerSHL_PARTS() 8378 SDValue Tmp5 = DAG.getNode(ISD::ADD, dl, AmtVT, Amt, in LowerSHL_PARTS() 8382 SDValue OutLo = DAG.getNode(PPCISD::SHL, dl, VT, Lo, Amt); in LowerSHL_PARTS() 8399 SDValue Amt = Op.getOperand(2); in LowerSRL_PARTS() local 8400 EVT AmtVT = Amt.getValueType(); in LowerSRL_PARTS() 8403 DAG.getConstant(BitWidth, dl, AmtVT), Amt); in LowerSRL_PARTS() 8404 SDValue Tmp2 = DAG.getNode(PPCISD::SRL, dl, VT, Lo, Amt); in LowerSRL_PARTS() [all …]
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | AMDGPUISelLowering.cpp | 3253 SDValue Amt = Src.getOperand(1); in performTruncateCombine() local 3254 KnownBits Known = DAG.computeKnownBits(Amt); in performTruncateCombine() 3267 if (Amt.getValueType() != NewShiftVT) { in performTruncateCombine() 3268 Amt = DAG.getZExtOrTrunc(Amt, SL, NewShiftVT); in performTruncateCombine() 3269 DCI.AddToWorklist(Amt.getNode()); in performTruncateCombine() 3273 Trunc, Amt); in performTruncateCombine()
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/third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
D | IceAssemblerARM32.cpp | 388 Operand *Amt = FlexReg->getShiftAmt(); in encodeOperand() local 392 if (const auto *Var = llvm::dyn_cast<Variable>(Amt)) { in encodeOperand() 401 if (const auto *ShAmt = llvm::dyn_cast<OperandARM32ShAmtImm>(Amt)) { in encodeOperand() 403 } else if (const auto *IntConst = llvm::dyn_cast<ConstantInteger32>(Amt)) { in encodeOperand()
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