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Searched refs:BRW_OPCODE_F32TO16 (Results 1 – 11 of 11) sorted by relevance

/third_party/mesa3d/src/intel/compiler/
Dbrw_shader.cpp177 if (devinfo->ver > 7 && op == BRW_OPCODE_F32TO16) in brw_instruction_name()
1002 case BRW_OPCODE_F32TO16: in can_do_saturate()
1051 case BRW_OPCODE_F32TO16: in can_do_cmod()
Dbrw_eu.cpp629 { BRW_OPCODE_F32TO16, 19, "f32to16", 1, 1, GFX7 | GFX75 },
Dbrw_eu_defines.h221 BRW_OPCODE_F32TO16, /**< Gfx7 only */ enumerator
Dbrw_ir_performance.cpp468 case BRW_OPCODE_F32TO16: in instruction_desc()
Dbrw_vec4_generator.cpp1670 case BRW_OPCODE_F32TO16: in generate_code()
Dbrw_fs_generator.cpp2147 case BRW_OPCODE_F32TO16: in generate_code()
Dbrw_eu_emit.c1282 inst = brw_alu1(p, BRW_OPCODE_F32TO16, dst, src); in brw_F32TO16()
Dbrw_fs.cpp7032 if (inst->opcode == BRW_OPCODE_F32TO16 && in is_mixed_float_with_packed_fp16_dst()
7338 case BRW_OPCODE_F32TO16: in get_lowered_simd_width()
Dbrw_fs_nir.cpp1671 bld.emit(BRW_OPCODE_F32TO16, tmp16, op[0]); in nir_emit_alu()
/third_party/mesa3d/src/intel/tools/
Di965_lex.l82 f32to16 { yylval.integer = BRW_OPCODE_F32TO16; return F32TO16; }
Di965_gram.y120 case BRW_OPCODE_F32TO16: in i965_asm_unary_instruction()