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Searched refs:BRW_OPCODE_SENDSC (Results 1 – 8 of 8) sorted by relevance

/third_party/mesa3d/src/intel/common/
Dintel_disasm.c37 opcode == BRW_OPCODE_SENDSC ); in is_send()
/third_party/mesa3d/src/intel/tools/
Di965_lex.l125 sendsc { yylval.integer = BRW_OPCODE_SENDSC; return SENDSC; }
/third_party/mesa3d/src/intel/compiler/
Dbrw_eu_validate.c99 case BRW_OPCODE_SENDSC: in inst_is_send()
115 case BRW_OPCODE_SENDSC: in inst_is_split_send()
Dbrw_eu.cpp667 { BRW_OPCODE_SENDSC, 52, "sendsc", 2, 1, GFX_GE(GFX9) & GFX_LT(GFX12) },
Dbrw_eu_defines.h253 BRW_OPCODE_SENDSC, /**< Gfx9+ */ enumerator
Dbrw_eu_emit.c127 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDSC) { in brw_set_dest()
224 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDSC)) { in brw_set_src0()
248 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDSC) { in brw_set_src0()
353 brw_inst_opcode(devinfo, inst) == BRW_OPCODE_SENDSC || in brw_set_src1()
Dbrw_disasm.c89 opcode == BRW_OPCODE_SENDSC; in is_send()
99 opcode == BRW_OPCODE_SENDSC; in is_split_send()
Dbrw_fs_generator.cpp346 devinfo->ver >= 12 ? BRW_OPCODE_SENDC : BRW_OPCODE_SENDSC); in generate_send()