Searched refs:CSINC (Results 1 – 12 of 12) sorted by relevance
| /third_party/pcre2/pcre2/src/sljit/ |
| D | sljitNativeARM_64.c | 85 #define CSINC 0x9a800400 macro
1815 FAIL_IF(push_inst(compiler, CSINC | (cc << 12) | RD(dst_r) | RN(TMP_ZERO) | RM(TMP_ZERO))); in sljit_emit_op_flags()
1840 FAIL_IF(push_inst(compiler, CSINC | (cc << 12) | RD(TMP_REG2) | RN(TMP_ZERO) | RM(TMP_ZERO))); in sljit_emit_op_flags()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.h | 255 CSINC, // Conditional select increment. enumerator
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| D | ARMISelLowering.cpp | 1707 case ARMISD::CSINC: return "ARMISD::CSINC"; in getTargetNodeName()
4972 Opcode = ARMISD::CSINC; in LowerSELECT_CC()
4974 Opcode = ARMISD::CSINC; in LowerSELECT_CC()
4983 if (Opcode != ARMISD::CSINC && in LowerSELECT_CC()
4993 if (FVal == 0 && Opcode != ARMISD::CSINC) { in LowerSELECT_CC()
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| D | ARMInstrInfo.td | 125 def ARMcsinc : SDNode<"ARMISD::CSINC", SDT_ARMCSel, [SDNPOptInGlue]>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.h | 47 CSINC, // Conditional select increment. enumerator
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| D | AArch64SchedThunderX2T99.td | 432 "CSINC(W|X)r", "CSINV(W|X)r",
454 "CSINC(W|X)r", "CSINV(W|X)r",
473 "CSINC(W|X)r", "CSINV(W|X)r",
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| D | AArch64SchedCyclone.td | 146 // CSEL,CSINC,CSINV,CSNEG
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| D | AArch64SchedFalkorDetails.td | 894 def : InstRW<[FalkorWr_1XYZ_1cyc], (instregex "^(CSEL|CSINC|CSINV|CSNEG)(W|X)r$")>;
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| D | AArch64SchedKryoDetails.td | 549 (instregex "(CSINC|CSNEG)(W|X)r")>;
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| D | AArch64ISelLowering.cpp | 1246 case AArch64ISD::CSINC: return "AArch64ISD::CSINC"; in getTargetNodeName()
5382 Opcode = AArch64ISD::CSINC; in LowerSELECT_CC()
5390 Opcode = AArch64ISD::CSINC; in LowerSELECT_CC()
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| D | AArch64InstrInfo.td | 403 def AArch64csinc : SDNode<"AArch64ISD::CSINC", SDT_AArch64CSel>;
1798 defm CSINC : CondSelectOp<0, 0b01, "csinc", inc>;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenDAGISel.inc | 44561 /* 96841*/ /*SwitchOpcode*/ 26, TARGET_VAL(ARMISD::CSINC),// ->96870
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