| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1047 enum CondCode { enum
1080 inline bool isSignedIntSetCC(CondCode Code) { in isSignedIntSetCC()
1086 inline bool isUnsignedIntSetCC(CondCode Code) { in isUnsignedIntSetCC()
1093 inline bool isTrueWhenEqual(CondCode Cond) { in isTrueWhenEqual()
1100 inline unsigned getUnorderedFlavor(CondCode Cond) { in getUnorderedFlavor()
1106 CondCode getSetCCInverse(CondCode Operation, EVT Type);
1115 CondCode getSetCCInverse(CondCode Operation, bool isIntegerLike);
1120 CondCode getSetCCSwappedOperands(CondCode Operation);
1125 CondCode getSetCCOrOperation(CondCode Op1, CondCode Op2, EVT Type);
1130 CondCode getSetCCAndOperation(CondCode Op1, CondCode Op2, EVT Type);
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| D | Analysis.h | 108 ISD::CondCode getFCmpCondCode(FCmpInst::Predicate Pred);
112 ISD::CondCode getFCmpCodeWithoutNaN(ISD::CondCode CC);
117 ISD::CondCode getICmpCondCode(ICmpInst::Predicate Pred);
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| D | TargetLowering.h | 1173 getCondCodeAction(ISD::CondCode CC, MVT VT) const { in getCondCodeAction()
1186 bool isCondCodeLegal(ISD::CondCode CC, MVT VT) const { in isCondCodeLegal()
1192 bool isCondCodeLegalOrCustom(ISD::CondCode CC, MVT VT) const { in isCondCodeLegalOrCustom()
2069 void setCondCodeAction(ISD::CondCode CC, MVT VT, in setCondCodeAction()
2626 void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) { in setCmpLibcallCC()
2632 ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const { in getCmpLibcallCC()
2808 ISD::CondCode CmpLibcallCCs[RTLIB::UNKNOWN_LIBCALL];
3033 SDValue &NewRHS, ISD::CondCode &CCCode,
3038 SDValue &NewRHS, ISD::CondCode &CCCode,
3309 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ConditionOptimizer.cpp | 102 using CmpInfo = std::tuple<int, unsigned, AArch64CC::CondCode>;
112 CmpInfo adjustCmp(MachineInstr *CmpMI, AArch64CC::CondCode Cmp);
114 bool adjustTo(MachineInstr *CmpMI, AArch64CC::CondCode Cmp, MachineInstr *To,
229 static AArch64CC::CondCode getAdjustedCmp(AArch64CC::CondCode Cmp) { in getAdjustedCmp()
243 MachineInstr *CmpMI, AArch64CC::CondCode Cmp) { in adjustCmp()
274 AArch64CC::CondCode Cmp; in modifyCmp()
305 static bool parseCond(ArrayRef<MachineOperand> Cond, AArch64CC::CondCode &CC) { in parseCond()
309 CC = (AArch64CC::CondCode)(int)Cond[0].getImm(); in parseCond()
319 AArch64CC::CondCode Cmp, MachineInstr *To, int ToImm) in adjustTo()
376 AArch64CC::CondCode HeadCmp; in runOnMachineFunction()
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| D | AArch64SpeculationHardening.cpp | 154 AArch64CC::CondCode &CondCode) const;
156 AArch64CC::CondCode &CondCode, DebugLoc DL) const;
188 AArch64CC::CondCode &CondCode) const { in endsWithCondControlFlow()
213 CondCode = AArch64CC::CondCode(analyzeBranchCondCode[0].getImm()); in endsWithCondControlFlow()
226 MachineBasicBlock &SplitEdgeBB, AArch64CC::CondCode &CondCode, in insertTrackingCode() argument
235 .addImm(CondCode); in insertTrackingCode()
247 AArch64CC::CondCode CondCode; in instrumentControlFlow() local
249 if (!endsWithCondControlFlow(MBB, TBB, FBB, CondCode)) { in instrumentControlFlow()
256 AArch64CC::CondCode InvCondCode = AArch64CC::getInvertedCondCode(CondCode); in instrumentControlFlow()
268 insertTrackingCode(*SplitEdgeTBB, CondCode, DL); in instrumentControlFlow()
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| D | AArch64InstructionSelector.cpp | 899 static AArch64CC::CondCode changeICMPPredToAArch64CC(CmpInst::Predicate P) { in changeICMPPredToAArch64CC()
927 AArch64CC::CondCode &CondCode, in changeFCMPPredToAArch64CC() argument
928 AArch64CC::CondCode &CondCode2) { in changeFCMPPredToAArch64CC()
934 CondCode = AArch64CC::EQ; in changeFCMPPredToAArch64CC()
937 CondCode = AArch64CC::GT; in changeFCMPPredToAArch64CC()
940 CondCode = AArch64CC::GE; in changeFCMPPredToAArch64CC()
943 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
946 CondCode = AArch64CC::LS; in changeFCMPPredToAArch64CC()
949 CondCode = AArch64CC::MI; in changeFCMPPredToAArch64CC()
953 CondCode = AArch64CC::VC; in changeFCMPPredToAArch64CC()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/ |
| D | LanaiCondCode.h | 10 enum CondCode { enum
34 inline static StringRef lanaiCondCodeToString(LPCC::CondCode CC) { in lanaiCondCodeToString()
73 inline static CondCode suffixToLanaiCondCode(StringRef S) { in suffixToLanaiCondCode()
74 return StringSwitch<CondCode>(S) in suffixToLanaiCondCode()
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| D | LanaiInstrInfo.cpp | 123 static LPCC::CondCode getOppositeCondition(LPCC::CondCode CC) { in getOppositeCondition()
351 SmallVector<std::pair<MachineOperand *, LPCC::CondCode>, 4> in optimizeCompareInstr()
371 LPCC::CondCode CC; in optimizeCompareInstr()
372 CC = (LPCC::CondCode)Instr.getOperand(IO - 1).getImm(); in optimizeCompareInstr()
375 LPCC::CondCode NewCC = getOppositeCondition(CC); in optimizeCompareInstr()
522 unsigned CondCode = MI.getOperand(3).getImm(); in optimizeSelect() local
524 NewMI.addImm(getOppositeCondition(LPCC::CondCode(CondCode))); in optimizeSelect()
526 NewMI.addImm(CondCode); in optimizeSelect()
625 LPCC::CondCode BranchCond = in analyzeBranch()
626 static_cast<LPCC::CondCode>(Instruction->getOperand(1).getImm()); in analyzeBranch()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/XCore/ |
| D | XCoreInstrInfo.cpp | 37 enum CondCode { enum
133 static XCore::CondCode GetCondFromBranchOpc(unsigned BrOpc) in GetCondFromBranchOpc()
146 static inline unsigned GetCondBranchFromCond(XCore::CondCode CC) in GetCondBranchFromCond()
157 static inline XCore::CondCode GetOppositeBranchCondition(XCore::CondCode CC) in GetOppositeBranchCondition()
212 XCore::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode()); in analyzeBranch()
233 XCore::CondCode BranchCode = GetCondFromBranchOpc(SecondLastOpc); in analyzeBranch()
289 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
298 unsigned Opc = GetCondBranchFromCond((XCore::CondCode)Cond[0].getImm()); in insertBranch()
406 Cond[0].setImm(GetOppositeBranchCondition((XCore::CondCode)Cond[0].getImm())); in reverseBranchCondition()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/MSP430/AsmParser/ |
| D | MSP430AsmParser.cpp | 318 unsigned CondCode; in parseJccInstruction() local
320 CondCode = MSP430CC::COND_NE; in parseJccInstruction()
322 CondCode = MSP430CC::COND_E; in parseJccInstruction()
324 CondCode = MSP430CC::COND_LO; in parseJccInstruction()
326 CondCode = MSP430CC::COND_HS; in parseJccInstruction()
328 CondCode = MSP430CC::COND_N; in parseJccInstruction()
330 CondCode = MSP430CC::COND_GE; in parseJccInstruction()
332 CondCode = MSP430CC::COND_L; in parseJccInstruction()
334 CondCode = MSP430CC::COND_NONE; in parseJccInstruction()
338 if (CondCode == (unsigned)MSP430CC::COND_NONE) in parseJccInstruction()
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| /third_party/mesa3d/src/gallium/drivers/nouveau/codegen/ |
| D | nv50_ir_inlines.h | 26 static inline CondCode reverseCondCode(CondCode cc) in reverseCondCode()
30 return static_cast<CondCode>(ccRev[cc & 7] | (cc & ~7)); in reverseCondCode()
33 static inline CondCode inverseCondCode(CondCode cc) in inverseCondCode()
35 return static_cast<CondCode>(cc ^ 7); in inverseCondCode()
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| D | nv50_ir.h | 328 enum CondCode enum
851 bool compare(CondCode cc, float fval) const;
893 bool setPredicate(CondCode ccode, Value *);
948 CondCode cc;
1132 void setCondition(CondCode cond) { setCond = cond; } in setCondition()
1133 CondCode getCondition() const { return setCond; } in getCondition()
1136 CondCode setCond;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86InstrInfo.h | 40 std::pair<CondCode, bool> getX86ConditionCode(CmpInst::Predicate Predicate);
49 CondCode getCondFromBranch(const MachineInstr &MI);
52 CondCode getCondFromSETCC(const MachineInstr &MI);
55 CondCode getCondFromCMov(const MachineInstr &MI);
59 CondCode GetOppositeBranchCondition(CondCode CC);
62 unsigned getVPCMPImmForCond(ISD::CondCode CC);
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| D | X86FlagsCopyLowering.cpp | 102 DebugLoc TestLoc, X86::CondCode Cond);
106 X86::CondCode Cond, CondRegArray &CondRegs);
341 static X86::CondCode getCondFromFCMOV(unsigned Opcode) { in getCondFromFCMOV()
754 X86::CondCode Cond = X86::getCondFromSETCC(MI); in collectCondsInRegs()
773 DebugLoc TestLoc, X86::CondCode Cond) { in promoteCondToReg()
785 DebugLoc TestLoc, X86::CondCode Cond, CondRegArray &CondRegs) { in getCondOrInverseInReg()
813 X86::CondCode Cond = X86::COND_INVALID; in rewriteArithmetic()
867 X86::CondCode Cond = X86::getCondFromCMov(CMovI); in rewriteCMov()
893 X86::CondCode Cond = getCondFromFCMOV(CMovI.getOpcode()); in rewriteFCMov()
935 X86::CondCode Cond = X86::getCondFromBranch(JmpI); in rewriteCondJmp()
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| D | X86CondBrFolding.cpp | 93 X86::CondCode BranchCode;
153 X86::CondCode CC = PredMBBInfo->BranchCode; in findPath()
250 X86::CondCode CC = MBBInfo->BranchCode; in fixupModifiedCond()
281 X86::CondCode CC; in optimizeCondBr()
309 X86::CondCode NewCC; in optimizeCondBr()
484 X86::CondCode CC; in analyzeMBB()
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| D | X86CmovConversion.cpp | 282 X86::CondCode FirstCC = X86::COND_INVALID, FirstOppCC = X86::COND_INVALID, in collectCmovCandidates()
293 X86::CondCode CC = X86::getCondFromCMov(I); in collectCmovCandidates()
655 X86::CondCode CC = X86::CondCode(X86::getCondFromCMov(MI)); in convertCmovInstsToBranches()
656 X86::CondCode OppCC = X86::GetOppositeBranchCondition(CC); in convertCmovInstsToBranches()
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| D | X86MacroFusion.cpp | 27 X86::CondCode CC = X86::getCondFromBranch(MI); in classifySecond()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/MCTargetDesc/ |
| D | MipsInstPrinter.h | 32 enum CondCode { enum
72 const char *MipsFCCToString(Mips::CondCode CC);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/MCTargetDesc/ |
| D | LanaiInstPrinter.cpp | 290 LPCC::CondCode CC = in printCCOperand()
291 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printCCOperand()
301 LPCC::CondCode CC = in printPredicateOperand()
302 static_cast<LPCC::CondCode>(MI->getOperand(OpNo).getImm()); in printPredicateOperand()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/ |
| D | AArch64BaseInfo.h | 235 enum CondCode { // Meaning (integer) Meaning (floating-point) enum
262 inline static const char *getCondCodeName(CondCode Code) { in getCondCodeName()
284 inline static CondCode getInvertedCondCode(CondCode Code) { in getInvertedCondCode()
287 return static_cast<CondCode>(static_cast<unsigned>(Code) ^ 0x1); in getInvertedCondCode()
294 inline static unsigned getNZCVToSatisfyCondCode(CondCode Code) { in getNZCVToSatisfyCondCode()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/MCTargetDesc/ |
| D | ARCInstPrinter.cpp | 54 static const char *ARCCondCodeToString(ARCCC::CondCode CC) { in ARCCondCodeToString()
172 O << ARCCondCodeToString((ARCCC::CondCode)Op.getImm()); in printPredicateOperand()
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| D | ARCInfo.h | 24 enum CondCode { enum
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Lanai/AsmParser/ |
| D | LanaiAsmParser.cpp | 1053 LPCC::CondCode CondCode = in splitMnemonic() local
1055 if (CondCode != LPCC::UNKNOWN) { in splitMnemonic()
1059 MCConstantExpr::create(CondCode, getContext()), NameLoc, NameLoc)); in splitMnemonic()
1073 LPCC::CondCode CondCode = LPCC::suffixToLanaiCondCode(Mnemonic); in splitMnemonic() local
1074 if (CondCode != LPCC::UNKNOWN) { in splitMnemonic()
1088 MCConstantExpr::create(CondCode, getContext()), NameLoc, NameLoc)); in splitMnemonic()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 678 class CondCode<string fcmpName = "", string icmpName = ""> {
683 // ISD::CondCode enums, and mapping to CmpInst::Predicate names
684 def SETOEQ : CondCode<"FCMP_OEQ">;
685 def SETOGT : CondCode<"FCMP_OGT">;
686 def SETOGE : CondCode<"FCMP_OGE">;
687 def SETOLT : CondCode<"FCMP_OLT">;
688 def SETOLE : CondCode<"FCMP_OLE">;
689 def SETONE : CondCode<"FCMP_ONE">;
690 def SETO : CondCode<"FCMP_ORD">;
691 def SETUO : CondCode<"FCMP_UNO">;
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARC/ |
| D | ARCInstrInfo.cpp | 102 static ARCCC::CondCode GetOppositeBranchCondition(ARCCC::CondCode CC) { in GetOppositeBranchCondition()
353 Cond[2].setImm(GetOppositeBranchCondition((ARCCC::CondCode)Cond[2].getImm())); in reverseBranchCondition()
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