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Searched refs:DHCSR (Results 1 – 11 of 11) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dcore_cm23.h1068 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1169 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_armv8mbl.h993 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1094 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_armv8mml.h1735 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1869 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_cm35p.h1810 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1944 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_cm33.h1810 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
1944 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_sc300.h1236 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_cm3.h1253 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_cm55.h2658 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
2829 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_armv81mml.h2623 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
2794 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_cm4.h1423 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member
Dcore_cm7.h1650 …__IOM uint32_t DHCSR; /*!< Offset: 0x000 (R/W) Debug Halting Control and Status … member