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Searched refs:EDX (Results 1 – 25 of 60) sorted by relevance

123

/third_party/mesa3d/src/mesa/x86/
D3dnow_xform3.S49 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
50 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
54 MOV_L ( REGOFF(V4F_START, ECX), EDX )
63 PREFETCHW ( REGIND(EDX) )
68 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
101 ADD_L ( CONST(16), EDX ) /* next output vertex */
104 MOVQ ( MM2, REGOFF(-16, EDX) ) /* write r0, r1 */
107 MOVQ ( MM5, REGOFF(-8, EDX) ) /* write r2, r3 */
134 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
135 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
[all …]
D3dnow_xform4.S49 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
50 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
54 MOV_L ( REGOFF(V4F_START, ECX), EDX )
63 PREFETCHW ( REGIND(EDX) )
68 PREFETCHW ( REGOFF(32, EDX) ) /* prefetch 2 vertices ahead */
83 ADD_L ( CONST(16), EDX ) /* next r */
113 MOVQ ( MM6, REGOFF(-16, EDX) )
115 MOVQ ( MM7, REGOFF(-8, EDX) )
142 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
143 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
[all …]
D3dnow_xform1.S49 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
50 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
54 MOV_L ( REGOFF(4, ECX), EDX )
82 MOVQ ( MM4, REGIND(EDX) ) /* write r1, r0 */
84 MOVQ ( MM5, REGOFF(8, EDX) ) /* write r3, r2 */
87 ADD_L ( CONST(16), EDX ) /* next r */
114 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
115 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
119 MOV_L ( REGOFF(4, ECX), EDX )
134 MOVD ( MM0, REGIND(EDX) ) /* | r0 */
[all …]
D3dnow_xform2.S49 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
50 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
54 MOV_L ( REGOFF(V4F_START, ECX), EDX )
90 MOVQ ( MM6, REGIND(EDX) ) /* write r1, r0 */
102 MOVQ ( MM6, REGOFF(8, EDX) ) /* write r3, r2 */
103 ADD_L ( CONST(16), EDX ) /* next r */
130 MOV_L ( REGOFF(V4F_COUNT, EAX), EDX )
131 MOV_L ( EDX, REGOFF(V4F_COUNT, ECX) )
135 MOV_L ( REGOFF(V4F_START, ECX), EDX )
155 MOVQ ( MM4, REGIND(EDX) ) /* write r1, r0 */
[all …]
Dx86_cliptest.S45 #define MAT0 REGOFF(0, EDX)
46 #define MAT1 REGOFF(4, EDX)
47 #define MAT2 REGOFF(8, EDX)
48 #define MAT3 REGOFF(12, EDX)
137 MOV_L( ARG_CLIP, EDX )
153 ADD_L( EDX, ECX )
156 CMP_L( ECX, EDX )
211 MOV_B( CL, REGIND(EDX) )
245 INC_L( EDX )
249 CMP_L( EDX, ARG_CLIP )
[all …]
Dx86_xform2.S50 #define MAT0 REGOFF(0, EDX)
51 #define MAT1 REGOFF(4, EDX)
52 #define MAT2 REGOFF(8, EDX)
53 #define MAT3 REGOFF(12, EDX)
54 #define MAT4 REGOFF(16, EDX)
55 #define MAT5 REGOFF(20, EDX)
56 #define MAT6 REGOFF(24, EDX)
57 #define MAT7 REGOFF(28, EDX)
58 #define MAT8 REGOFF(32, EDX)
59 #define MAT9 REGOFF(36, EDX)
[all …]
Dx86_xform3.S50 #define MAT0 REGOFF(0, EDX)
51 #define MAT1 REGOFF(4, EDX)
52 #define MAT2 REGOFF(8, EDX)
53 #define MAT3 REGOFF(12, EDX)
54 #define MAT4 REGOFF(16, EDX)
55 #define MAT5 REGOFF(20, EDX)
56 #define MAT6 REGOFF(24, EDX)
57 #define MAT7 REGOFF(28, EDX)
58 #define MAT8 REGOFF(32, EDX)
59 #define MAT9 REGOFF(36, EDX)
[all …]
Dx86_xform4.S50 #define MAT0 REGOFF(0, EDX)
51 #define MAT1 REGOFF(4, EDX)
52 #define MAT2 REGOFF(8, EDX)
53 #define MAT3 REGOFF(12, EDX)
54 #define MAT4 REGOFF(16, EDX)
55 #define MAT5 REGOFF(20, EDX)
56 #define MAT6 REGOFF(24, EDX)
57 #define MAT7 REGOFF(28, EDX)
58 #define MAT8 REGOFF(32, EDX)
59 #define MAT9 REGOFF(36, EDX)
[all …]
Dsse_normal.S41 #define M(i) REGOFF(i * 4, EDX)
59 MOV_L ( ARG_MAT, EDX ) /* ptr to matrix */
60 ADD_L ( CONST(MATRIX_INV), EDX ) /* matrix->inv */
121 MOV_L ( ARG_MAT, EDX ) /* ptr to matrix */
122 ADD_L ( CONST(MATRIX_INV), EDX ) /* matrix->inv */
214 MOV_L ( ARG_MAT, EDX ) /* ptr to matrix */
215 ADD_L ( CONST(MATRIX_INV), EDX ) /* matrix->inv */
Dsse_xform2.S43 #define M(i) REGOFF(i * 4, EDX)
58 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
142 MOV_L ( S(0), EDX )
143 MOV_L ( EDX, D(0) )
144 MOV_L ( S(1), EDX )
145 MOV_L ( EDX, D(1) )
172 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
233 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
292 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
355 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
[all …]
Dsse_xform3.S43 #define M(i) REGOFF(i * 4, EDX)
58 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
78 MOVAPS ( REGOFF(0, EDX), XMM0 ) /* m0 | m1 | m2 | m3 */
79 MOVAPS ( REGOFF(16, EDX), XMM1 ) /* m4 | m5 | m6 | m7 */
80 MOVAPS ( REGOFF(32, EDX), XMM2 ) /* m8 | m9 | m10 | m11 */
81 MOVAPS ( REGOFF(48, EDX), XMM3 ) /* m12 | m13 | m14 | m15 */
184 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
251 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
324 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
389 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
[all …]
Dsse_xform1.S43 #define M(i) REGOFF(i * 4, EDX)
58 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
138 MOV_L( S(0), EDX )
139 MOV_L( EDX, D(0) )
167 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
228 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
287 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
342 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
399 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
Dsse_xform4.S38 #define MAT(i) REGOFF(i * 4, EDX)
54 MOV_L( ARG_MATRIX, EDX )
126 MOV_L( ARG_MATRIX, EDX ) /* ptr to matrix */
198 MOV_L( ARG_MATRIX, EDX )
Dcommon_x86_asm.S89 MOV_L (EDX, REGIND(EDI))
145 MOV_L (EDX, EAX) /* return EDX */
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Support/
DHost.cpp979 static void getAvailableFeatures(unsigned ECX, unsigned EDX, unsigned MaxLeaf, in getAvailableFeatures() argument
998 if ((EDX >> 15) & 1) in getAvailableFeatures()
1000 if ((EDX >> 23) & 1) in getAvailableFeatures()
1002 if ((EDX >> 25) & 1) in getAvailableFeatures()
1004 if ((EDX >> 26) & 1) in getAvailableFeatures()
1031 bool HasAVX = ((ECX & AVXBits) == AVXBits) && !getX86XCR0(&EAX, &EDX) && in getAvailableFeatures()
1047 MaxLeaf >= 0x7 && !getX86CpuIDAndInfoEx(0x7, 0x0, &EAX, &EBX, &ECX, &EDX); in getAvailableFeatures()
1093 if (HasLeaf7 && ((EDX >> 2) & 1) && HasAVX512Save) in getAvailableFeatures()
1095 if (HasLeaf7 && ((EDX >> 3) & 1) && HasAVX512Save) in getAvailableFeatures()
1097 if (HasLeaf7 && ((EDX >> 8) & 1) && HasAVX512Save) in getAvailableFeatures()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrSystem.td407 let Uses = [EAX, ECX, EDX] in
409 let Defs = [EAX, EDX], Uses = [ECX] in
433 let Defs = [EAX, EBX, ECX, EDX], Uses = [EAX, ECX] in
514 let Defs = [EDX, EAX], Uses = [ECX] in
517 let Uses = [EDX, EAX, ECX] in
520 [(int_x86_xsetbv ECX, EDX, EAX)]>, TB;
524 let Uses = [EDX, EAX] in {
527 [(int_x86_xsave addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE]>;
530 [(int_x86_xsave64 addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE, In64BitMode]>;
533 [(int_x86_xrstor addr:$dst, EDX, EAX)]>, PS, Requires<[HasXSAVE]>;
[all …]
DX86CallingConv.td43 let GPR_32 = [EAX, ECX, EDX, EDI, ESI];
63 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R10D, R11D, R12D, R14D, R15D];
70 let GPR_32 = [EAX, ECX, EDX, EDI, ESI, R8D, R9D, R12D, R13D, R14D, R15D];
220 CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>,
285 CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>,
316 CCIfType<[i32], CCAssignToReg<[ESI, EBP, EAX, EDX]>>
394 CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX, R8D]>>,
522 CCIfType<[i32], CCAssignToReg<[EDI, ESI, EDX, ECX, R8D, R9D]>>,
647 CCIfType<[i32], CCAssignToRegWithShadow<[ECX , EDX , R8D , R9D ],
846 CCIfNotVarArg<CCIfInReg<CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>>>,
[all …]
DX86InstrArithmetic.td71 // EAX,EDX = EAX*GR32
72 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX], hasSideEffects = 0 in
75 [/*(set EAX, EDX, EFLAGS, (X86umul_flag EAX, GR32:$src))*/]>,
97 // EAX,EDX = EAX*[mem32]
98 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
117 // EAX,EDX = EAX*GR32
118 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
135 // EAX,EDX = EAX*[mem32]
136 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX] in
289 let Defs = [EAX,EDX,EFLAGS], Uses = [EAX,EDX] in
[all …]
/third_party/musl/arch/i386/bits/
Dreg.h5 #define EDX 2 macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Support/Solaris/sys/
Dregset.h26 #undef EDX
/third_party/boost/libs/context/src/asm/
Djump_i386_ms_pe_masm.asm80 ; load NT_TIB into EDX
110 ; FCTX == EAX, DATA == EDX
Dmake_i386_ms_pe_masm.asm96 ; load 'next' member of current SEH into EDX
125 ; FCTX == EAX, DATA == EDX
/third_party/openh264/codec/common/x86/
Dcpuid.asm164 XGETBV ; result in EDX:EAX
196 XGETBV ; result in EDX:EAX
232 XGETBV ; result in EDX:EAX
/third_party/libunwind/src/x86/
Dunwind_i.h38 #define EDX 2 macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp107 {codeview::RegisterId::EDX, X86::EDX}, in initLLVMToSEHAndCVRegMapping()
617 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
629 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
666 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
702 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()
703 return X86::EDX; in getX86SubSuperRegisterOrZero()
738 case X86::DH: case X86::DL: case X86::DX: case X86::EDX: case X86::RDX: in getX86SubSuperRegisterOrZero()

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