/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
D | ConstrainedOps.def | 71 FUNCTION(maxnum, 2, 0, experimental_constrained_maxnum, FMAXNUM)
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | ISDOpcodes.h | 652 FMINNUM, FMAXNUM, enumerator
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D | BasicTTIImpl.h | 1255 ISDs.push_back(ISD::FMAXNUM);
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D | TargetLowering.h | 2260 case ISD::FMAXNUM: in isCommutativeBinOp()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
D | PPCTargetTransformInfo.cpp | 323 case Intrinsic::maxnum: Opcode = ISD::FMAXNUM; break; in mightUseCTR() 392 Opcode = ISD::FMAXNUM; break; in mightUseCTR()
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D | PPCISelLowering.cpp | 593 setOperationAction(ISD::FMAXNUM, VT, Legal); in PPCTargetLowering() 1014 setOperationAction(ISD::FMAXNUM, MVT::v4f64, Legal); in PPCTargetLowering() 1059 setOperationAction(ISD::FMAXNUM, MVT::v4f32, Legal); in PPCTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | SIISelLowering.cpp | 414 setOperationAction(ISD::FMAXNUM, MVT::f32, Custom); in SITargetLowering() 416 setOperationAction(ISD::FMAXNUM, MVT::f64, Custom); in SITargetLowering() 601 setOperationAction(ISD::FMAXNUM, MVT::f16, Custom); in SITargetLowering() 610 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Expand); in SITargetLowering() 656 setOperationAction(ISD::FMAXNUM, MVT::v2f16, Custom); in SITargetLowering() 660 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Custom); in SITargetLowering() 723 setTargetDAGCombine(ISD::FMAXNUM); in SITargetLowering() 4085 case ISD::FMAXNUM: in LowerOperation() 5810 return DAG.getNode(ISD::FMAXNUM, DL, VT, Tmp, in LowerINTRINSIC_WO_CHAIN() 8623 case ISD::FMAXNUM: in fp16SrcZerosHighBits() [all …]
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D | AMDGPUISelLowering.cpp | 259 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in AMDGPUTargetLowering() 405 setOperationAction(ISD::FMAXNUM, VT, Expand); in AMDGPUTargetLowering() 519 case ISD::FMAXNUM: in fnegFoldsIntoOp() 3646 case ISD::FMAXNUM: in inverseMinMax() 3649 return ISD::FMAXNUM; in inverseMinMax() 3763 case ISD::FMAXNUM: in performFNegCombine()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
D | GenericOpcodes.td | 536 // FMINNUM/FMAXNUM - Perform floating-point minimum or maximum on two 559 // FMINNUM/FMAXNUM in the handling of signaling NaNs. If one input is a
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D | TargetSelectionDAG.td | 443 def fmaxnum : SDNode<"ISD::FMAXNUM" , SDTFPBinOp,
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorOps.cpp | 413 case ISD::FMAXNUM: in LegalizeOp() 928 case ISD::FMAXNUM: in Expand()
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D | SelectionDAGDumper.cpp | 184 case ISD::FMAXNUM: return "fmaxnum"; in getOperationName()
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D | LegalizeFloatTypes.cpp | 71 case ISD::FMAXNUM: R = SoftenFloatRes_FMAXNUM(N); break; in SoftenFloatResult() 1133 case ISD::FMAXNUM: ExpandFloatRes_FMAXNUM(N, Lo, Hi); break; in ExpandFloatResult() 2130 case ISD::FMAXNUM: in PromoteFloatResult()
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D | SelectionDAGBuilder.cpp | 3351 case SPNB_RETURNS_OTHER: Opc = ISD::FMAXNUM; break; in visitSelect() 3354 if (TLI.isOperationLegalOrCustom(ISD::FMAXNUM, VT)) in visitSelect() 3355 Opc = ISD::FMAXNUM; in visitSelect() 3359 Opc = TLI.isOperationLegalOrCustom(ISD::FMAXNUM, VT.getScalarType()) ? in visitSelect() 3360 ISD::FMAXNUM : ISD::FMAXIMUM; in visitSelect() 6226 setValue(&I, DAG.getNode(ISD::FMAXNUM, sdl, in visitIntrinsicCall() 7654 if (visitBinaryFloatCall(I, ISD::FMAXNUM)) in visitCall()
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D | LegalizeVectorTypes.cpp | 115 case ISD::FMAXNUM: in ScalarizeVectorResult() 915 case ISD::FMAXNUM: in SplitVectorResult() 2082 CombineOpc = NoNaN ? ISD::FMAXNUM : ISD::FMAXIMUM; in SplitVecOp_VECREDUCE() 2720 case ISD::FMAXNUM: in WidenVectorResult()
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D | LegalizeDAG.cpp | 3187 case ISD::FMAXNUM: { in ExpandNode() 3943 case ISD::FMAXNUM: in ConvertNodeToLibcall() 4452 case ISD::FMAXNUM: in PromoteNode()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/ |
D | RISCVISelLowering.cpp | 169 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in RISCVTargetLowering() 186 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); in RISCVTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
D | SystemZISelLowering.cpp | 544 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); in SystemZTargetLowering() 549 setOperationAction(ISD::FMAXNUM, MVT::v2f64, Legal); in SystemZTargetLowering() 554 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in SystemZTargetLowering() 559 setOperationAction(ISD::FMAXNUM, MVT::v4f32, Legal); in SystemZTargetLowering() 564 setOperationAction(ISD::FMAXNUM, MVT::f128, Legal); in SystemZTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | TargetLoweringBase.cpp | 640 setOperationAction(ISD::FMAXNUM, VT, Expand); in initActions()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonISelLowering.cpp | 1486 ISD::FMINNUM, ISD::FMAXNUM, ISD::FSINCOS, in HexagonTargetLowering() 1589 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in HexagonTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMISelLowering.cpp | 342 setOperationAction(ISD::FMAXNUM, VT, Legal); in addMVEVectorTypes() 724 setOperationAction(ISD::FMAXNUM, MVT::f16, Legal); in ARMTargetLowering() 1383 setOperationAction(ISD::FMAXNUM, MVT::f32, Legal); in ARMTargetLowering() 1386 setOperationAction(ISD::FMAXNUM, MVT::v2f32, Legal); in ARMTargetLowering() 1388 setOperationAction(ISD::FMAXNUM, MVT::v4f32, Legal); in ARMTargetLowering() 1399 setOperationAction(ISD::FMAXNUM, MVT::f64, Legal); in ARMTargetLowering() 1435 setOperationAction(ISD::FMAXNUM, MVT::v4f16, Legal); in ARMTargetLowering() 1437 setOperationAction(ISD::FMAXNUM, MVT::v8f16, Legal); in ARMTargetLowering() 3748 ? ISD::FMINNUM : ISD::FMAXNUM; in LowerINTRINSIC_WO_CHAIN()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
D | NVPTXISelLowering.cpp | 573 ISD::FABS, ISD::FMINNUM, ISD::FMAXNUM}) { in NVPTXTargetLowering() 580 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote); in NVPTXTargetLowering()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64ISelLowering.cpp | 453 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote); in AArch64TargetLowering() 514 setOperationAction(ISD::FMAXNUM, Ty, Legal); in AArch64TargetLowering() 531 setOperationAction(ISD::FMAXNUM, MVT::f16, Legal); in AArch64TargetLowering() 935 {ISD::FMINIMUM, ISD::FMAXIMUM, ISD::FMINNUM, ISD::FMAXNUM}) in addTypeForNEON() 11022 return DAG.getNode(ISD::FMAXNUM, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/ |
D | PPCGenFastISel.inc | 2075 // FastEmit functions for ISD::FMAXNUM. 3285 case ISD::FMAXNUM: return fastEmit_ISD_FMAXNUM_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
D | MipsSEISelLowering.cpp | 160 setOperationAction(ISD::FMAXNUM, MVT::f16, Promote); in MipsSETargetLowering()
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