| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/ |
| D | ConstrainedOps.def | 74 FUNCTION(minimum, 2, 0, experimental_constrained_minimum, FMINIMUM)
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 663 FMINIMUM, FMAXIMUM, enumerator
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| D | BasicTTIImpl.h | 1252 ISDs.push_back(ISD::FMINIMUM);
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| D | TargetLowering.h | 2263 case ISD::FMINIMUM: in isCommutativeBinOp()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | GenericOpcodes.td | 575 // FMINIMUM/FMAXIMUM - NaN-propagating minimum/maximum that also treat -0.0
577 // semantics, FMINIMUM/FMAXIMUM follow IEEE 754-2018 draft semantics.
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| D | TargetSelectionDAG.td | 449 def fminimum : SDNode<"ISD::FMINIMUM" , SDTFPBinOp,
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 188 case ISD::FMINIMUM: return "fminimum"; in getOperationName()
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| D | LegalizeVectorTypes.cpp | 118 case ISD::FMINIMUM: in ScalarizeVectorResult()
916 case ISD::FMINIMUM: in SplitVectorResult()
2085 CombineOpc = NoNaN ? ISD::FMINNUM : ISD::FMINIMUM; in SplitVecOp_VECREDUCE()
2721 case ISD::FMINIMUM: in WidenVectorResult()
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| D | LegalizeVectorOps.cpp | 416 case ISD::FMINIMUM: in LegalizeOp()
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| D | SelectionDAGBuilder.cpp | 3333 case SPNB_RETURNS_NAN: Opc = ISD::FMINIMUM; break; in visitSelect()
3338 else if (TLI.isOperationLegalOrCustom(ISD::FMINIMUM, VT)) in visitSelect()
3339 Opc = ISD::FMINIMUM; in visitSelect()
3342 ISD::FMINNUM : ISD::FMINIMUM; in visitSelect()
6232 setValue(&I, DAG.getNode(ISD::FMINIMUM, sdl, in visitIntrinsicCall()
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| D | LegalizeFloatTypes.cpp | 2129 case ISD::FMINIMUM: in PromoteFloatResult()
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| D | TargetLowering.cpp | 6341 Node->getOpcode() == ISD::FMINNUM ? ISD::FMINIMUM : ISD::FMAXIMUM; in expandFMINNUM_FMAXNUM()
7626 BaseOpcode = NoNaN ? ISD::FMINNUM : ISD::FMINIMUM; in expandVecReduce()
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| D | SelectionDAG.cpp | 4175 case ISD::FMINIMUM: in isKnownNeverNaN()
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| D | DAGCombiner.cpp | 1590 case ISD::FMINIMUM: return visitFMINIMUM(N); in visit()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 547 setOperationAction(ISD::FMINIMUM, MVT::f64, Legal); in SystemZTargetLowering()
552 setOperationAction(ISD::FMINIMUM, MVT::v2f64, Legal); in SystemZTargetLowering()
557 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal); in SystemZTargetLowering()
562 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal); in SystemZTargetLowering()
567 setOperationAction(ISD::FMINIMUM, MVT::f128, Legal); in SystemZTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 643 setOperationAction(ISD::FMINIMUM, VT, Expand); in initActions()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/WebAssembly/ |
| D | WebAssemblyISelLowering.cpp | 102 setOperationAction(ISD::FMINIMUM, T, Legal); in WebAssemblyTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMISelLowering.cpp | 1424 setOperationAction(ISD::FMINIMUM, MVT::f16, Legal); in ARMTargetLowering()
1426 setOperationAction(ISD::FMINIMUM, MVT::f32, Legal); in ARMTargetLowering()
1428 setOperationAction(ISD::FMINIMUM, MVT::v2f32, Legal); in ARMTargetLowering()
1430 setOperationAction(ISD::FMINIMUM, MVT::v4f32, Legal); in ARMTargetLowering()
1439 setOperationAction(ISD::FMINIMUM, MVT::v4f16, Legal); in ARMTargetLowering()
1441 setOperationAction(ISD::FMINIMUM, MVT::v8f16, Legal); in ARMTargetLowering()
3771 ? ISD::FMINIMUM : ISD::FMAXIMUM; in LowerINTRINSIC_WO_CHAIN()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64ISelLowering.cpp | 454 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote); in AArch64TargetLowering()
515 setOperationAction(ISD::FMINIMUM, Ty, Legal); in AArch64TargetLowering()
532 setOperationAction(ISD::FMINIMUM, MVT::f16, Legal); in AArch64TargetLowering()
935 {ISD::FMINIMUM, ISD::FMAXIMUM, ISD::FMINNUM, ISD::FMAXNUM}) in addTypeForNEON()
11019 return DAG.getNode(ISD::FMINIMUM, SDLoc(N), N->getValueType(0), in performIntrinsicCombine()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/ |
| D | NVPTXISelLowering.cpp | 581 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote); in NVPTXTargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 161 setOperationAction(ISD::FMINIMUM, MVT::f16, Promote); in MipsSETargetLowering()
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenFastISel.inc | 3932 // FastEmit functions for ISD::FMINIMUM.
5494 case ISD::FMINIMUM: return fastEmit_ISD_FMINIMUM_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| D | ARMGenDAGISel.inc | 55527 /*121348*/ /*SwitchOpcode*/ 28|128,2/*284*/, TARGET_VAL(ISD::FMINIMUM),// ->121636
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/ |
| D | AArch64GenFastISel.inc | 7983 // FastEmit functions for ISD::FMINIMUM.
9814 case ISD::FMINIMUM: return fastEmit_ISD_FMINIMUM_rr(VT, RetVT, Op0, Op0IsKill, Op1, Op1IsKill);
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| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 37240 case ISD::FMINIMUM: in scalarizeExtEltFP()
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