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Searched refs:FP_TO_SINT (Results 1 – 25 of 42) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMTargetTransformInfo.cpp267 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
269 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 3 }, in getCastInstrCost()
271 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
285 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
287 { ISD::FP_TO_SINT, MVT::v8i16, MVT::v8f32, 4 }, in getCastInstrCost()
289 { ISD::FP_TO_SINT, MVT::v16i16, MVT::v16f32, 8 }, in getCastInstrCost()
302 { ISD::FP_TO_SINT, MVT::i1, MVT::f32, 2 }, in getCastInstrCost()
304 { ISD::FP_TO_SINT, MVT::i1, MVT::f64, 2 }, in getCastInstrCost()
306 { ISD::FP_TO_SINT, MVT::i8, MVT::f32, 2 }, in getCastInstrCost()
308 { ISD::FP_TO_SINT, MVT::i8, MVT::f64, 2 }, in getCastInstrCost()
[all …]
DARMISelLowering.cpp174 setOperationAction(ISD::FP_TO_SINT, VT, Custom); in addTypeForNEON()
179 setOperationAction(ISD::FP_TO_SINT, VT, Expand); in addTypeForNEON()
299 setOperationAction(ISD::FP_TO_SINT, VT, Expand); in addMVEVectorTypes()
869 setOperationAction(ISD::FP_TO_SINT, MVT::v4i16, Custom); in ARMTargetLowering()
870 setOperationAction(ISD::FP_TO_SINT, MVT::v8i16, Custom); in ARMTargetLowering()
921 setTargetDAGCombine(ISD::FP_TO_SINT); in ARMTargetLowering()
978 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in ARMTargetLowering()
980 setOperationAction(ISD::FP_TO_SINT, MVT::f64, Custom); in ARMTargetLowering()
5406 if (Op.getOpcode() == ISD::FP_TO_SINT || in LowerFP_TO_INT()
5426 DAG.getNode(Op.getOpcode() == ISD::STRICT_FP_TO_SINT ? ISD::FP_TO_SINT in LowerFP_TO_INT()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64TargetTransformInfo.cpp367 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f32, 1 }, in getCastInstrCost()
368 { ISD::FP_TO_SINT, MVT::v4i32, MVT::v4f32, 1 }, in getCastInstrCost()
369 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
375 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f32, 2 }, in getCastInstrCost()
376 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f32, 1 }, in getCastInstrCost()
377 { ISD::FP_TO_SINT, MVT::v2i8, MVT::v2f32, 1 }, in getCastInstrCost()
383 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
384 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 2 }, in getCastInstrCost()
389 { ISD::FP_TO_SINT, MVT::v2i32, MVT::v2f64, 2 }, in getCastInstrCost()
390 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f64, 2 }, in getCastInstrCost()
[all …]
DAArch64ISelLowering.cpp284 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in AArch64TargetLowering()
285 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in AArch64TargetLowering()
286 setOperationAction(ISD::FP_TO_SINT, MVT::i128, Custom); in AArch64TargetLowering()
638 setTargetDAGCombine(ISD::FP_TO_SINT); in AArch64TargetLowering()
731 setOperationAction(ISD::FP_TO_SINT, MVT::v1i64, Expand); in AArch64TargetLowering()
920 setOperationAction(ISD::FP_TO_SINT, VT, Custom); in addTypeForNEON()
2613 if (Op.getOpcode() == ISD::FP_TO_SINT || in LowerFP_TO_INT()
3253 case ISD::FP_TO_SINT: in LowerOperation()
10001 bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT; in performFpToIntCombine()
12562 case ISD::FP_TO_SINT: in PerformDAGCombine()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DREADME-FPStack.txt50 FP_TO_SINT when the source operand is already in memory.
DX86TargetTransformInfo.cpp1317 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f32, 1 }, in getCastInstrCost()
1318 { ISD::FP_TO_SINT, MVT::v4i64, MVT::v4f32, 1 }, in getCastInstrCost()
1319 { ISD::FP_TO_SINT, MVT::v8i64, MVT::v8f32, 1 }, in getCastInstrCost()
1320 { ISD::FP_TO_SINT, MVT::v2i64, MVT::v2f64, 1 }, in getCastInstrCost()
1321 { ISD::FP_TO_SINT, MVT::v4i64, MVT::v4f64, 1 }, in getCastInstrCost()
1322 { ISD::FP_TO_SINT, MVT::v8i64, MVT::v8f64, 1 }, in getCastInstrCost()
1506 { ISD::FP_TO_SINT, MVT::v4i8, MVT::v4f32, 1 }, in getCastInstrCost()
1507 { ISD::FP_TO_SINT, MVT::v8i8, MVT::v8f32, 7 }, in getCastInstrCost()
1583 { ISD::FP_TO_SINT, MVT::v4i16, MVT::v4f32, 2 }, in getCastInstrCost()
1584 { ISD::FP_TO_SINT, MVT::v2i16, MVT::v2f64, 2 }, in getCastInstrCost()
[all …]
DX86ISelLowering.cpp249 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote); in X86TargetLowering()
252 setOperationAction(ISD::FP_TO_SINT, MVT::i16, Custom); in X86TargetLowering()
254 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in X86TargetLowering()
258 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in X86TargetLowering()
802 setOperationAction(ISD::FP_TO_SINT, VT, Expand); in X86TargetLowering()
966 setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal); in X86TargetLowering()
967 setOperationAction(ISD::FP_TO_SINT, MVT::v2i32, Custom); in X86TargetLowering()
973 setOperationAction(ISD::FP_TO_SINT, VT, Custom); in X86TargetLowering()
1180 setOperationPromotedToType(ISD::FP_TO_SINT, MVT::v8i16, MVT::v8i32); in X86TargetLowering()
1184 setOperationAction(ISD::FP_TO_SINT, MVT::v8i32, Legal); in X86TargetLowering()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/IR/
DConstrainedOps.def46 INSTRUCTION(FPToSI, 1, 0, experimental_constrained_fptosi, FP_TO_SINT)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DISDOpcodes.h585 FP_TO_SINT, enumerator
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DLegalizeVectorOps.cpp408 case ISD::FP_TO_SINT: in LegalizeOp()
567 case ISD::FP_TO_SINT: in Promote()
672 TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT)) in PromoteFP_TO_INT()
673 NewOpc = ISD::FP_TO_SINT; in PromoteFP_TO_INT()
DLegalizeFloatTypes.cpp782 case ISD::FP_TO_SINT: in SoftenFloatOperand()
877 bool Signed = N->getOpcode() == ISD::FP_TO_SINT || in SoftenFloatOp_FP_TO_XINT()
1663 case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break; in ExpandFloatOperand()
1972 case ISD::FP_TO_SINT: in PromoteFloatOperand()
DSelectionDAGDumper.cpp337 case ISD::FP_TO_SINT: return "fp_to_sint"; in getOperationName()
DLegalizeVectorTypes.cpp92 case ISD::FP_TO_SINT: in ScalarizeVectorResult()
571 case ISD::FP_TO_SINT: in ScalarizeVectorOperand()
886 case ISD::FP_TO_SINT: in SplitVectorResult()
1961 case ISD::FP_TO_SINT: in SplitVectorOperand()
2794 case ISD::FP_TO_SINT: in WidenVectorResult()
4213 case ISD::FP_TO_SINT: in WidenVectorOperand()
DLegalizeDAG.cpp2555 bool IsSigned = N->getOpcode() == ISD::FP_TO_SINT || in PromoteLegalFP_TO_INT()
2571 OpToUse = IsStrict ? ISD::STRICT_FP_TO_SINT : ISD::FP_TO_SINT; in PromoteLegalFP_TO_INT()
2975 case ISD::FP_TO_SINT: in ExpandNode()
4281 case ISD::FP_TO_SINT: in PromoteNode()
DLegalizeIntegerTypes.cpp121 case ISD::FP_TO_SINT: in PromoteIntegerResult()
519 TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT)) in PromoteIntRes_FP_TO_XINT()
520 NewOpc = ISD::FP_TO_SINT; in PromoteIntRes_FP_TO_XINT()
1816 case ISD::FP_TO_SINT: ExpandIntRes_FP_TO_SINT(N, Lo, Hi); break; in ExpandIntegerResult()
DTargetLowering.cpp6112 ISD::FP_TO_SINT; in expandFP_TO_UINT()
6130 Result = DAG.getNode(ISD::FP_TO_SINT, dl, DstVT, Src); in expandFP_TO_UINT()
6172 SInt = DAG.getNode(ISD::FP_TO_SINT, dl, DstVT, Val); in expandFP_TO_UINT()
6181 SDValue True = DAG.getNode(ISD::FP_TO_SINT, dl, DstVT, Src); in expandFP_TO_UINT()
6183 SDValue False = DAG.getNode(ISD::FP_TO_SINT, dl, DstVT, in expandFP_TO_UINT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DR600ISelLowering.cpp167 setOperationAction(ISD::FP_TO_SINT, MVT::i1, Custom); in R600TargetLowering()
168 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in R600TargetLowering()
278 setTargetDAGCombine(ISD::FP_TO_SINT); in R600TargetLowering()
668 case ISD::FP_TO_SINT: { in ReplaceNodeResults()
1863 case ISD::FP_TO_SINT: { in PerformDAGCombine()
DAMDGPUISelLowering.cpp342 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in AMDGPUTargetLowering()
364 setOperationAction(ISD::FP_TO_SINT, VT, Expand); in AMDGPUTargetLowering()
1151 case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG); in LowerOperation()
1550 ISD::NodeType ToInt = Sign ? ISD::FP_TO_SINT : ISD::FP_TO_UINT; in LowerDIVREM24()
2601 SDValue Hi = DAG.getNode(Signed ? ISD::FP_TO_SINT : ISD::FP_TO_UINT, SL, in LowerFP64_TO_INT()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCISelLowering.cpp233 setOperationAction(ISD::FP_TO_SINT, MVT::ppcf128, Custom); in PPCTargetLowering()
376 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Legal); in PPCTargetLowering()
381 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in PPCTargetLowering()
513 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in PPCTargetLowering()
534 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in PPCTargetLowering()
540 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in PPCTargetLowering()
709 setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal); in PPCTargetLowering()
865 setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal); in PPCTargetLowering()
996 setOperationAction(ISD::FP_TO_SINT , MVT::v4f64, Legal); in PPCTargetLowering()
1044 setOperationAction(ISD::FP_TO_SINT , MVT::v4f32, Legal); in PPCTargetLowering()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp1509 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in SparcTargetLowering()
1511 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in SparcTargetLowering()
3019 case ISD::FP_TO_SINT: return LowerFP_TO_SINT(Op, DAG, *this, in LowerOperation()
3346 case ISD::FP_TO_SINT: in ReplaceNodeResults()
3352 libCall = ((N->getOpcode() == ISD::FP_TO_SINT) in ReplaceNodeResults()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/
DHexagonISelLowering.cpp1594 setOperationAction(ISD::FP_TO_SINT, MVT::i1, Promote); in HexagonTargetLowering()
1595 setOperationAction(ISD::FP_TO_SINT, MVT::i8, Promote); in HexagonTargetLowering()
1596 setOperationAction(ISD::FP_TO_SINT, MVT::i16, Promote); in HexagonTargetLowering()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsISelLowering.cpp359 setOperationAction(ISD::FP_TO_SINT, MVT::i32, Custom); in MipsTargetLowering()
375 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom); in MipsTargetLowering()
1244 case ISD::FP_TO_SINT: return lowerFP_TO_SINT(Op, DAG); in LowerOperation()
2783 if (Val.getOpcode() != ISD::FP_TO_SINT || in lowerFP_TO_SINT_STORE()
DMipsSEISelLowering.cpp356 setOperationAction(ISD::FP_TO_SINT, Ty, Legal); in addMSAIntType()
1933 return DAG.getNode(ISD::FP_TO_SINT, DL, Op->getValueType(0), in lowerINTRINSIC_WO_CHAIN()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DTargetLoweringBase.cpp1624 case FPToSI: return ISD::FP_TO_SINT; in InstructionOpcodeToISD()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZISelLowering.cpp399 setOperationAction(ISD::FP_TO_SINT, MVT::v2i64, Legal); in SystemZTargetLowering()
400 setOperationAction(ISD::FP_TO_SINT, MVT::v2f64, Legal); in SystemZTargetLowering()
419 setOperationAction(ISD::FP_TO_SINT, MVT::v4i32, Legal); in SystemZTargetLowering()
420 setOperationAction(ISD::FP_TO_SINT, MVT::v4f32, Legal); in SystemZTargetLowering()

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