Home
last modified time | relevance | path

Searched refs:HasV5TOps (Results 1 – 8 of 8) sorted by relevance

/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMSubtarget.h147 bool HasV5TOps = false; variable
569 bool hasV5TOps() const { return HasV5TOps; } in hasV5TOps()
DARM.td463 def HasV5TOps : SubtargetFeature<"v5t", "HasV5TOps", "true",
470 [HasV5TOps]>;
644 def ARMv5t : Architecture<"armv5t", "ARMv5t", [HasV5TOps]>;
DARMPredicates.td13 AssemblerPredicate<"HasV5TOps", "armv5t">;
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/
DARMTargetStreamer.cpp145 else if (STI.hasFeature(ARM::HasV5TOps)) in getArchForCPU()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenSubtargetInfo.inc146 HasV5TOps = 130,
346 { "v5t", "Support ARM v5T instructions", ARM::HasV5TOps, { { { 0x0ULL, 0x0ULL, 0x1ULL, } } } },
19497 if (Bits[ARM::HasV5TOps]) HasV5TOps = true;
DARMGenDisassemblerTables.inc16620 return (!Bits[ARM::ModeThumb] && Bits[ARM::HasV5TOps]);
16670 return (Bits[ARM::ModeThumb] && Bits[ARM::HasV5TOps]);
16684 return (Bits[ARM::ModeThumb] && Bits[ARM::HasV5TOps] && !Bits[ARM::FeatureMClass]);
DARMGenMCCodeEmitter.inc16368 if ((FB[ARM::HasV5TOps]))
DARMGenAsmMatcher.inc9757 if ((FB[ARM::HasV5TOps]))