Searched refs:HasV7Ops (Results 1 – 15 of 15) sorted by relevance
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenSystemRegister.inc | 278 { "basepri", 0x811, 0x111, 0x811, {ARM::HasV7Ops} }, // 24 279 { "basepri_max", 0x812, 0x112, 0x812, {ARM::HasV7Ops} }, // 25 280 { "faultmask", 0x813, 0x113, 0x813, {ARM::HasV7Ops} }, // 26 287 { "basepri_ns", 0x891, 0x191, 0x891, {ARM::Feature8MSecExt, ARM::HasV7Ops} }, // 33 288 { "faultmask_ns", 0x893, 0x193, 0x893, {ARM::Feature8MSecExt, ARM::HasV7Ops} }, // 34
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D | ARMGenSubtargetInfo.inc | 151 HasV7Ops = 135, 352 …{ "v7", "Support ARM v7 instructions", ARM::HasV7Ops, { { { 0x0ULL, 0x1000002000000ULL, 0x40ULL, }… 19502 if (Bits[ARM::HasV7Ops]) HasV7Ops = true;
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D | ARMGenDisassemblerTables.inc | 16628 return (!Bits[ARM::ModeThumb] && Bits[ARM::HasV7Ops]); 16630 return (!Bits[ARM::ModeThumb] && Bits[ARM::HasV7Ops] && Bits[ARM::FeatureMP]); 16724 return (Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && Bits[ARM::HasV7Ops]); 16728 …return (Bits[ARM::ModeThumb] && Bits[ARM::FeatureThumb2] && Bits[ARM::HasV7Ops] && Bits[ARM::Featu…
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D | ARMGenMCCodeEmitter.inc | 16398 if ((FB[ARM::HasV7Ops]))
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D | ARMGenAsmMatcher.inc | 9787 if ((FB[ARM::HasV7Ops]))
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMSystemRegister.td | 79 let Requires = [{ {ARM::HasV7Ops} }] in { 99 let Requires = [{ {ARM::Feature8MSecExt, ARM::HasV7Ops} }] in {
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D | ARM.td | 492 def HasV7Ops : SubtargetFeature<"v7", "HasV7Ops", "true", 500 [HasV7Ops]>; 504 [HasV7Ops, FeatureAcquireRelease]>; 675 def ARMv7a : Architecture<"armv7-a", "ARMv7a", [HasV7Ops, 681 def ARMv7ve : Architecture<"armv7ve", "ARMv7ve", [HasV7Ops, 690 def ARMv7r : Architecture<"armv7-r", "ARMv7r", [HasV7Ops, 696 def ARMv7m : Architecture<"armv7-m", "ARMv7m", [HasV7Ops, 704 def ARMv7em : Architecture<"armv7e-m", "ARMv7em", [HasV7Ops,
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D | ARMSubtarget.h | 153 bool HasV7Ops = false; variable 575 bool hasV7Ops() const { return HasV7Ops; } in hasV7Ops()
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D | ARMPredicates.td | 57 AssemblerPredicate<"HasV7Ops", "armv7">;
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D | ARMBaseInstrInfo.h | 655 if (featureBits[ARM::HasV7Ops] && (Num & 0xE) == 0xA) in isValidCoprocessorNumber()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
D | ARMTargetStreamer.cpp | 131 else if (STI.hasFeature(ARM::HasV7Ops)) { in getArchForCPU()
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D | ARMMCTargetDesc.cpp | 39 if (STI.getFeatureBits()[llvm::ARM::HasV7Ops] && in getMCRDeprecationInfo()
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D | ARMInstPrinter.cpp | 884 if (Opcode == ARM::t2MSR_M && FeatureBits [ARM::HasV7Ops]) { in printMSRMaskOperand()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
D | ARMDisassembler.cpp | 3774 bool hasV7Ops = featureBits[ARM::HasV7Ops]; in DecodeT2LoadShift() 3862 bool hasV7Ops = featureBits[ARM::HasV7Ops]; in DecodeT2LoadImm8() 3943 bool hasV7Ops = featureBits[ARM::HasV7Ops]; in DecodeT2LoadImm12() 4060 bool hasV7Ops = featureBits[ARM::HasV7Ops]; in DecodeT2LoadLabel() 4676 if (!(FeatureBits[ARM::HasV7Ops])) in DecodeMSRMask() 4705 if (!(FeatureBits[ARM::HasV7Ops])) { in DecodeMSRMask()
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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
D | ARMAsmParser.cpp | 481 return getSTI().getFeatureBits()[ARM::HasV7Ops]; in hasV7Ops()
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