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Searched refs:I915_TILING_Y (Results 1 – 19 of 19) sorted by relevance

/third_party/mesa3d/src/intel/isl/
Disl_drm.c47 return I915_TILING_Y; in isl_tiling_to_i915_tiling()
71 case I915_TILING_Y: in isl_tiling_from_i915_tiling()
/third_party/mesa3d/src/mesa/drivers/dri/i915/
Dintel_clear.c133 if (stencilRegion->tiling == I915_TILING_Y || in intelClear()
153 if (irb->tiling == I915_TILING_Y || tri_mask & BUFFER_BIT_STENCIL) in intelClear()
Dintel_blit.c97 bool dst_y_tiled = dst_tiling == I915_TILING_Y; in emit_copy_blit()
98 bool src_y_tiled = src_tiling == I915_TILING_Y; in emit_copy_blit()
422 assert(region->tiling != I915_TILING_Y); in intelClearWithBlit()
515 if (dst_tiling == I915_TILING_Y) in intelEmitImmediateColorExpandBlit()
Dintel_regions.c250 case I915_TILING_Y: in intel_region_get_tile_masks()
279 case I915_TILING_Y: in intel_region_get_aligned_offset()
Dintel_tex_subimage.c64 if (intelImage->mt->region->tiling == I915_TILING_Y) in intel_blit_texsubimage()
Dintel_mipmap_tree.c135 return I915_TILING_Y; in intel_miptree_choose_tiling()
188 bool y_or_x = tiling == (I915_TILING_Y | I915_TILING_X); in intel_miptree_create()
191 y_or_x ? I915_TILING_Y : tiling, in intel_miptree_create()
Di830_texstate.c169 if (intelObj->mt->region->tiling == I915_TILING_Y) in i830_update_tex_unit()
Di915_texstate.c184 if (intelObj->mt->region->tiling == I915_TILING_Y) in i915_update_tex_unit()
Di915_vtbl.c531 if (region->tiling == I915_TILING_Y) in i915_set_buf_info_for_region()
/third_party/libdrm/include/drm/
Di915_drm.h1233 #define I915_TILING_Y 2 macro
1234 #define I915_TILING_LAST I915_TILING_Y
/third_party/mesa3d/include/drm-uapi/
Di915_drm.h1524 #define I915_TILING_Y 2 macro
1525 #define I915_TILING_LAST I915_TILING_Y
/third_party/mesa3d/src/intel/vulkan/
Danv_android.c533 case I915_TILING_Y: in anv_image_init_from_gralloc()
Danv_image.c1542 case I915_TILING_Y: in resolve_ahw_image()
/third_party/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_bufmgr.c747 else if (tiling == I915_TILING_Y) in brw_bo_alloc_tiled_2d()
1561 tiling_mode == I915_TILING_Y); in brw_bo_gem_create_from_prime_tiled()
Dbrw_screen.c416 [I915_TILING_Y] = I915_FORMAT_MOD_Y_TILED, in tiling_to_modifier()
Dbrw_mipmap_tree.c1438 BRW_MEMZONE_OTHER, I915_TILING_Y, in brw_alloc_aux_buffer()
/third_party/libdrm/intel/
Dintel_bufmgr_gem.c371 && *tiling_mode == I915_TILING_Y)) in drm_intel_gem_bo_tile_pitch()
908 && tiling == I915_TILING_Y)) in drm_intel_gem_bo_alloc_tiled()
910 else if (tiling == I915_TILING_Y) in drm_intel_gem_bo_alloc_tiled()
/third_party/mesa3d/src/gallium/drivers/crocus/
Dcrocus_resource.c773 [I915_TILING_Y] = I915_FORMAT_MOD_Y_TILED, in tiling_to_modifier()
/third_party/mesa3d/src/gallium/drivers/iris/
Diris_resource.c1156 [I915_TILING_Y] = I915_FORMAT_MOD_Y_TILED, in tiling_to_modifier()