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Searched refs:INTEL_L3P_ALL (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/mesa/drivers/dri/i965/
Dgfx7_l3_state.c74 const bool has_dc = cfg->n[INTEL_L3P_DC] || cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
76 cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
78 cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
80 cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
127 SET_FIELD(cfg->n[INTEL_L3P_ALL], GFX8_L3CNTLREG_ALL_ALLOC)); in setup_l3_config()
132 assert(!cfg->n[INTEL_L3P_ALL]); in setup_l3_config()
164 SET_FIELD(cfg->n[INTEL_L3P_ALL], GFX7_L3CNTLREG2_ALL_ALLOC) | in setup_l3_config()
/third_party/mesa3d/src/intel/common/
Dintel_l3_config.c240 (w0.w[INTEL_L3P_DC] && !w1.w[INTEL_L3P_DC] && !w1.w[INTEL_L3P_ALL]) || in intel_diff_l3_weights()
269 w.w[INTEL_L3P_ALL] = 1.0; in intel_get_default_l3_weights()
378 cfg->n[INTEL_L3P_SLM], cfg->n[INTEL_L3P_URB], cfg->n[INTEL_L3P_ALL], in intel_dump_l3_config()
Dintel_l3_config.h40 INTEL_L3P_ALL, enumerator
/third_party/mesa3d/src/intel/vulkan/
DgenX_state.c396 l3cr.AllAllocation = cfg->n[INTEL_L3P_ALL]; in genX()
402 const bool has_dc = cfg->n[INTEL_L3P_DC] || cfg->n[INTEL_L3P_ALL]; in genX()
404 cfg->n[INTEL_L3P_ALL]; in genX()
406 cfg->n[INTEL_L3P_ALL]; in genX()
408 cfg->n[INTEL_L3P_ALL]; in genX()
410 assert(!cfg->n[INTEL_L3P_ALL]); in genX()
443 l3cr2.ALLAllocation = cfg->n[INTEL_L3P_ALL]; in genX()
/third_party/mesa3d/src/gallium/drivers/crocus/
Dcrocus_state.c1067 const bool has_dc = cfg->n[INTEL_L3P_DC] || cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
1069 cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
1071 cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
1073 cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
1119 reg.AllAllocation = cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
1122 assert(!cfg->n[INTEL_L3P_ALL]); in setup_l3_config()
1157 reg.ALLAllocation = cfg->n[INTEL_L3P_ALL]; in setup_l3_config()
/third_party/mesa3d/src/gallium/drivers/iris/
Diris_state.c774 reg.AllAllocation = cfg->n[INTEL_L3P_ALL]; in iris_emit_l3_config()