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Searched refs:ISL_GFX_VER (Results 1 – 10 of 10) sorted by relevance

/third_party/mesa3d/src/intel/isl/
Disl_gfx7.c31 assert(ISL_GFX_VER(dev) == 7); in gfx7_format_needs_valign2()
57 assert(ISL_GFX_VER(dev) == 7); in isl_gfx7_choose_msaa_layout()
201 if (ISL_GFX_VER(dev) >= 12) { in isl_gfx6_filter_tiling()
205 } else if (ISL_GFX_VER(dev) >= 9) { in isl_gfx6_filter_tiling()
229 if (ISL_GFX_VER(dev) >= 12) { in isl_gfx6_filter_tiling()
251 if (ISL_GFX_VER(dev) >= 12) { in isl_gfx6_filter_tiling()
254 } else if (ISL_GFX_VER(dev) >= 9) { in isl_gfx6_filter_tiling()
285 if (ISL_GFX_VER(dev) == 7 && in isl_gfx6_filter_tiling()
305 if (ISL_GFX_VER(dev) < 7 && isl_format_get_layout(info->format)->bpb >= 128) in isl_gfx6_filter_tiling()
326 (ISL_GFX_VER(dev) == 8 || in isl_gfx6_filter_tiling()
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Disl.c203 dev->use_separate_stencil = ISL_GFX_VER(dev) >= 6; in isl_device_init()
272 if (ISL_GFX_VER(dev) >= 7) { in isl_device_init()
299 if (ISL_GFX_VER(dev) >= 9) { in isl_device_get_sample_counts()
305 } else if (ISL_GFX_VER(dev) >= 8) { in isl_device_get_sample_counts()
310 } else if (ISL_GFX_VER(dev) >= 7) { in isl_device_get_sample_counts()
314 } else if (ISL_GFX_VER(dev) >= 6) { in isl_device_get_sample_counts()
604 UNUSED bool ivb_ccs = ISL_GFX_VER(dev) < 12 && in isl_surf_choose_tiling()
606 UNUSED bool tgl_ccs = ISL_GFX_VER(dev) >= 12 && in isl_surf_choose_tiling()
615 } else if (ISL_GFX_VER(dev) >= 6) { in isl_surf_choose_tiling()
663 if (ISL_GFX_VER(dev) >= 8) { in isl_choose_msaa_layout()
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Disl_storage_image.c260 if (ISL_GFX_VER(dev) < 9 && surf->dim == ISL_SURF_DIM_3D) { in isl_surf_fill_image_param()
314 param->tiling[2] = (ISL_GFX_VER(dev) < 9 && surf->dim == ISL_SURF_DIM_3D ? in isl_surf_fill_image_param()
Disl_gfx6.c33 assert(ISL_GFX_VER(dev) == 6); in isl_gfx6_choose_msaa_layout()
Disl_gfx4.c61 *flags &= (ISL_GFX_VER(dev) == 4 && !ISL_DEV_IS_G4X(dev)) ? in isl_gfx4_filter_tiling()
Disl_gfx8.c176 if (ISL_GFX_VER(dev) >= 11 && isl_tiling_is_any_y(tiling) && in isl_gfx8_choose_image_alignment_el()
Disl.h57 #ifndef ISL_GFX_VER
64 #define ISL_GFX_VER(__dev) ((__dev)->info->ver) macro
69 (assert(ISL_GFX_VER(__dev) == (__dev)->info->ver) && \
/third_party/mesa3d/src/intel/blorp/
Dblorp_clear.c740 if (ISL_GFX_VER(batch->blorp->isl_dev) <= 6) { in blorp_clear_stencil_as_rgba()
812 if (ISL_GFX_VER(batch->blorp->isl_dev) == 6) { in blorp_clear_depth_stencil()
1019 assert(ISL_GFX_VER(batch->blorp->isl_dev) >= 8); in blorp_hiz_clear_depth_stencil()
1214 if (ISL_GFX_VER(batch->blorp->isl_dev) >= 12) { in blorp_ccs_resolve()
1217 } else if (ISL_GFX_VER(batch->blorp->isl_dev) >= 9) { in blorp_ccs_resolve()
1220 } else if (ISL_GFX_VER(batch->blorp->isl_dev) >= 8) { in blorp_ccs_resolve()
1399 if (ISL_GFX_VER(batch->blorp->isl_dev) >= 10) { in blorp_ccs_ambiguate()
1409 assert(ISL_GFX_VER(batch->blorp->isl_dev) >= 7); in blorp_ccs_ambiguate()
1456 if (ISL_GFX_VER(batch->blorp->isl_dev) >= 8) { in blorp_ccs_ambiguate()
Dblorp_blit.c2549 if (ISL_GFX_VER(isl_dev) >= 9) { in get_copy_format_for_bpb()
/third_party/mesa3d/docs/relnotes/
D21.1.0.rst796 - intel: Rename ISL_DEV_GEN to ISL_GFX_VER