/third_party/mesa3d/src/gallium/auxiliary/util/ |
D | u_box.h | 137 width = MAX2(a->x + a->width, b->x + b->width) - x; in u_box_union_1d() 151 x = MAX2(a->x, b->x); in u_box_intersect_1d() 171 dst->width = MAX2(a->x + a->width, b->x + b->width) - x; in u_box_union_2d() 172 dst->height = MAX2(a->y + a->height, b->y + b->height) - y; in u_box_union_2d() 188 dst->width = MAX2(a->x + a->width, b->x + b->width) - x; in u_box_union_3d() 189 dst->height = MAX2(a->y + a->height, b->y + b->height) - y; in u_box_union_3d() 190 dst->depth = MAX2(a->z + a->depth, b->z + b->depth) - z; in u_box_union_3d() 204 a_r[0] = MAX2(a->x, a->x + a->width); in u_box_test_intersection_2d() 206 a_r[1] = MAX2(a->y, a->y + a->height); in u_box_test_intersection_2d() 209 b_r[0] = MAX2(b->x, b->x + b->width); in u_box_test_intersection_2d() [all …]
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D | u_range.h | 69 range->end = MAX2(end, range->end); in util_range_add() 73 range->end = MAX2(end, range->end); in util_range_add() 83 return MAX2(start, range->start) < MIN2(end, range->end); in util_ranges_intersect()
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D | u_framebuffer.c | 198 num_layers = MAX2(num_layers, num); in util_framebuffer_get_num_layers() 204 num_layers = MAX2(num_layers, num); in util_framebuffer_get_num_layers() 230 return MAX2(fb->samples, 1); in util_framebuffer_get_num_samples() 247 return MAX2(fb->samples, 1); in util_framebuffer_get_num_samples()
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/third_party/mesa3d/src/gallium/drivers/vc4/ |
D | vc4_emit.c | 51 minx = MAX2(vp_minx, 0); in vc4_emit_state() 52 miny = MAX2(vp_miny, 0); in vc4_emit_state() 53 maxx = MAX2(MIN2(vp_maxx, job->draw_width), minx); in vc4_emit_state() 54 maxy = MAX2(MIN2(vp_maxy, job->draw_height), miny); in vc4_emit_state() 56 minx = MAX2(vp_minx, vc4->scissor.minx); in vc4_emit_state() 57 miny = MAX2(vp_miny, vc4->scissor.miny); in vc4_emit_state() 58 maxx = MAX2(MIN2(vp_maxx, vc4->scissor.maxx), minx); in vc4_emit_state() 59 maxy = MAX2(MIN2(vp_maxy, vc4->scissor.maxy), miny); in vc4_emit_state() 71 job->draw_max_x = MAX2(job->draw_max_x, maxx); in vc4_emit_state() 72 job->draw_max_y = MAX2(job->draw_max_y, maxy); in vc4_emit_state()
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D | vc4_qir_live_variables.c | 55 c->temp_end[var] = MAX2(c->temp_end[var], ip); in qir_setup_use() 96 c->temp_end[var] = MAX2(c->temp_end[var], ip); in qir_setup_def() 271 c->temp_end[i] = MAX2(c->temp_end[i], in qir_compute_start_end() 278 c->temp_end[i] = MAX2(c->temp_end[i], in qir_compute_start_end() 320 last_ip = MAX2(last_ip, c->temp_end[i]); in qir_calculate_live_intervals() 331 max_reg_pressure = MAX2(max_reg_pressure, reg_pressure); in qir_calculate_live_intervals()
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/third_party/mesa3d/src/freedreno/fdl/ |
D | fd_layout_test.c | 41 int max_size = MAX2(testcase->layout.width0, testcase->layout.height0); in fdl_test_layout() 50 MAX2(testcase->layout.nr_samples, 1), testcase->layout.width0, in fdl_test_layout() 51 MAX2(testcase->layout.height0, 1), in fdl_test_layout() 52 MAX2(testcase->layout.depth0, 1), mip_levels, in fdl_test_layout() 53 MAX2(testcase->array_size, 1), testcase->is_3d, NULL); in fdl_test_layout() 57 MAX2(testcase->layout.nr_samples, 1), testcase->layout.width0, in fdl_test_layout() 58 MAX2(testcase->layout.height0, 1), in fdl_test_layout() 59 MAX2(testcase->layout.depth0, 1), mip_levels, in fdl_test_layout() 60 MAX2(testcase->array_size, 1), testcase->is_3d); in fdl_test_layout()
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/third_party/mesa3d/src/mesa/state_tracker/ |
D | st_scissor.c | 46 dst_rect->minx = MAX2(src_rect->X, 0); in st_window_rectangles_to_blit() 47 dst_rect->miny = MAX2(src_rect->Y, 0); in st_window_rectangles_to_blit() 48 dst_rect->maxx = MAX2(src_rect->X + src_rect->Width, 0); in st_window_rectangles_to_blit() 49 dst_rect->maxy = MAX2(src_rect->Y + src_rect->Height, 0); in st_window_rectangles_to_blit()
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D | st_atom_scissor.c | 68 GLint xmax = MAX2(0, ctx->Scissor.ScissorArray[i].X + ctx->Scissor.ScissorArray[i].Width); in st_update_scissor() 69 GLint ymax = MAX2(0, ctx->Scissor.ScissorArray[i].Y + ctx->Scissor.ScissorArray[i].Height); in st_update_scissor() 127 new_rects[i].minx = MAX2(rect->X, 0); in st_update_window_rectangles() 128 new_rects[i].miny = MAX2(rect->Y, 0); in st_update_window_rectangles() 129 new_rects[i].maxx = MAX2(rect->X + rect->Width, 0); in st_update_window_rectangles() 130 new_rects[i].maxy = MAX2(rect->Y + rect->Height, 0); in st_update_window_rectangles()
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/third_party/mesa3d/src/gallium/drivers/nouveau/codegen/ |
D | nv50_ir_sched_gm107.h | 66 return MAX2(getLatestRd(), getLatestWr()); in getLatest() 71 rd.r[i] = MAX2(rd.r[i], that->rd.r[i]); in setMax() 72 wr.r[i] = MAX2(wr.r[i], that->wr.r[i]); in setMax() 75 rd.p[i] = MAX2(rd.p[i], that->rd.p[i]); in setMax() 76 wr.p[i] = MAX2(wr.p[i], that->wr.p[i]); in setMax() 78 rd.c = MAX2(rd.c, that->rd.c); in setMax() 79 wr.c = MAX2(wr.c, that->wr.c); in setMax()
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/third_party/mesa3d/src/amd/common/ |
D | ac_binary.c | 55 conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 8); in ac_parse_shader_binary_config() 57 conf->num_vgprs = MAX2(conf->num_vgprs, (G_00B028_VGPRS(value) + 1) * 4); in ac_parse_shader_binary_config() 59 conf->num_sgprs = MAX2(conf->num_sgprs, (G_00B028_SGPRS(value) + 1) * 8); in ac_parse_shader_binary_config() 65 conf->lds_size = MAX2(conf->lds_size, G_00B02C_EXTRA_LDS_SIZE(value)); in ac_parse_shader_binary_config() 83 conf->lds_size = MAX2(conf->lds_size, G_00B84C_LDS_SIZE(value)); in ac_parse_shader_binary_config()
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D | ac_gpu_info.c | 979 ib_align = MAX2(ib_align, gfx.ib_start_alignment); in ac_query_gpu_info() 980 ib_align = MAX2(ib_align, gfx.ib_size_alignment); in ac_query_gpu_info() 981 ib_align = MAX2(ib_align, compute.ib_start_alignment); in ac_query_gpu_info() 982 ib_align = MAX2(ib_align, compute.ib_size_alignment); in ac_query_gpu_info() 983 ib_align = MAX2(ib_align, dma.ib_start_alignment); in ac_query_gpu_info() 984 ib_align = MAX2(ib_align, dma.ib_size_alignment); in ac_query_gpu_info() 985 ib_align = MAX2(ib_align, uvd.ib_start_alignment); in ac_query_gpu_info() 986 ib_align = MAX2(ib_align, uvd.ib_size_alignment); in ac_query_gpu_info() 987 ib_align = MAX2(ib_align, uvd_enc.ib_start_alignment); in ac_query_gpu_info() 988 ib_align = MAX2(ib_align, uvd_enc.ib_size_alignment); in ac_query_gpu_info() [all …]
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D | ac_rtld.c | 223 *lds_end_align = MAX2(*lds_end_align, s.align); in read_private_lds_symbols() 354 uint64_t sh_align = MAX2(shdr->sh_addralign, 1); in ac_rtld_open() 392 binary->lds_size = MAX2(binary->lds_size, part_lds_size); in ac_rtld_open() 531 config->num_sgprs = MAX2(config->num_sgprs, c.num_sgprs); in ac_rtld_read_config() 532 config->num_vgprs = MAX2(config->num_vgprs, c.num_vgprs); in ac_rtld_read_config() 533 config->spilled_sgprs = MAX2(config->spilled_sgprs, c.spilled_sgprs); in ac_rtld_read_config() 534 config->spilled_vgprs = MAX2(config->spilled_vgprs, c.spilled_vgprs); in ac_rtld_read_config() 536 MAX2(config->scratch_bytes_per_wave, c.scratch_bytes_per_wave); in ac_rtld_read_config() 548 config->lds_size = MAX2(config->lds_size, c.lds_size); in ac_rtld_read_config() 777 size = MAX2(size, s->offset + shdr->sh_size); in ac_rtld_upload()
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/third_party/mesa3d/src/gallium/drivers/radeonsi/ |
D | si_state_binning.c | 190 unsigned sum = 4 * (depth_coeff + stencil_coeff) * MAX2(tex->buffer.b.b.nr_samples, 1); in si_get_depth_bin_size() 313 const unsigned num_pipes = MAX2(num_rbs, sctx->screen->info.num_tcc_blocks); in gfx10_get_bin_sizes() 356 cColor = MAX2(cColor, 1u); in gfx10_get_bin_sizes() 366 cFmask = MAX2(cFmask, 1u); in gfx10_get_bin_sizes() 380 color_bin_size->x = MAX2(binSizeX, minBinSizeX); in gfx10_get_bin_sizes() 381 color_bin_size->y = MAX2(binSizeY, minBinSizeY); in gfx10_get_bin_sizes() 394 (cPerDepthSample + cPerStencilSample) * MAX2(zstex->buffer.b.b.nr_samples, 1); in gfx10_get_bin_sizes() 396 const unsigned depthLog2Pixels = util_logbase2(depthBinSizeTagPart / MAX2(cDepth, 1u)); in gfx10_get_bin_sizes() 400 depth_bin_size->x = MAX2(depthBinSizeX, minBinSizeX); in gfx10_get_bin_sizes() 401 depth_bin_size->y = MAX2(depthBinSizeY, minBinSizeY); in gfx10_get_bin_sizes()
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/third_party/mesa3d/src/amd/compiler/ |
D | aco_insert_NOPs.cpp | 46 MAX2(set_vskip_mode_then_vector, other.set_vskip_mode_then_vector); in join() 47 valu_wr_vcc_then_vccz = MAX2(valu_wr_vcc_then_vccz, other.valu_wr_vcc_then_vccz); in join() 48 valu_wr_exec_then_execz = MAX2(valu_wr_exec_then_execz, other.valu_wr_exec_then_execz); in join() 49 valu_wr_vcc_then_div_fmas = MAX2(valu_wr_vcc_then_div_fmas, other.valu_wr_vcc_then_div_fmas); in join() 51 MAX2(salu_wr_m0_then_gds_msg_ttrace, other.salu_wr_m0_then_gds_msg_ttrace); in join() 52 valu_wr_exec_then_dpp = MAX2(valu_wr_exec_then_dpp, other.valu_wr_exec_then_dpp); in join() 53 salu_wr_m0_then_lds = MAX2(salu_wr_m0_then_lds, other.salu_wr_m0_then_lds); in join() 54 salu_wr_m0_then_moverel = MAX2(salu_wr_m0_then_moverel, other.salu_wr_m0_then_moverel); in join() 55 setreg_then_getsetreg = MAX2(setreg_then_getsetreg, other.setreg_then_getsetreg); in join() 227 *nops_needed = MAX2(*nops_needed - get_wait_states(pred), 0); in handle_raw_hazard_instr() [all …]
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D | aco_statistics.cpp | 205 cost = MAX2(cost, res_available[(int)perf.rsrc0] - cur_cycle); in cycles_until_res_available() 207 cost = MAX2(cost, res_available[(int)perf.rsrc1] - cur_cycle); in cycles_until_res_available() 291 deps_available = MAX2(deps_available, vm[i]); in get_dependency_cost() 295 deps_available = MAX2(deps_available, exp[i]); in get_dependency_cost() 299 deps_available = MAX2(deps_available, lgkm[i]); in get_dependency_cost() 303 deps_available = MAX2(deps_available, vs[i]); in get_dependency_cost() 308 deps_available = MAX2(deps_available, reg_available[i]); in get_dependency_cost() 314 deps_available = MAX2(deps_available, reg_available[op.physReg().reg() + i]); in get_dependency_cost() 396 int32_t result_available = start + MAX2(perf.latency, latency); in add() 401 available[i] = MAX2(available[i], result_available); in add() [all …]
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/third_party/libdrm/ |
D | util_math.h | 28 #define MAX2( A, B ) ( (A)>(B) ? (A) : (B) ) macro 29 #define MAX3( A, B, C ) ((A) > (B) ? MAX2(A, C) : MAX2(B, C))
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/third_party/mesa3d/src/freedreno/ir3/ |
D | ir3_delay.c | 158 delay = MAX2(delay, d); in delay_calc_srcn_prera() 184 delay = MAX2(delay, d); in ir3_delay_calc_prera() 265 unsigned first_num = MAX2(src_start, dst_start) / reg_elem_size(dst); in delay_calc_srcn_postra() 338 new_delay = MAX2(new_delay, src_delay); in delay_calc_postra() 343 delay = MAX2(delay, new_delay); in delay_calc_postra() 370 delay = MAX2(delay, pred_delay); in delay_calc_postra()
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D | ir3_shader.c | 85 v->info.max_half_reg = MAX2(v->info.max_half_reg, regid >> 2); in fixup_regfootprint() 87 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint() 90 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint() 102 v->info.max_half_reg = MAX2(v->info.max_half_reg, regid >> 2); in fixup_regfootprint() 104 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint() 107 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint() 116 v->info.max_half_reg = MAX2(v->info.max_half_reg, regid >> 2); in fixup_regfootprint() 118 v->info.max_reg = MAX2(v->info.max_reg, regid >> 3); in fixup_regfootprint() 121 v->info.max_reg = MAX2(v->info.max_reg, regid >> 2); in fixup_regfootprint() 169 v->constlen = MAX2(v->constlen, info->max_const + 1); in ir3_shader_assemble() [all …]
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D | ir3_nir.c | 807 MAX2(layout->num_driver_params, IR3_DP_VTXID_BASE + 1); in ir3_nir_scan_driver_consts() 811 MAX2(layout->num_driver_params, IR3_DP_INSTID_BASE + 1); in ir3_nir_scan_driver_consts() 815 layout->num_driver_params = MAX2(layout->num_driver_params, in ir3_nir_scan_driver_consts() 820 MAX2(layout->num_driver_params, IR3_DP_NUM_WORK_GROUPS_Z + 1); in ir3_nir_scan_driver_consts() 823 layout->num_driver_params = MAX2(layout->num_driver_params, in ir3_nir_scan_driver_consts() 828 MAX2(layout->num_driver_params, IR3_DP_BASE_GROUP_Z + 1); in ir3_nir_scan_driver_consts() 832 MAX2(layout->num_driver_params, IR3_DP_SUBGROUP_SIZE + 1); in ir3_nir_scan_driver_consts() 836 MAX2(layout->num_driver_params, IR3_DP_SUBGROUP_ID_SHIFT + 1); in ir3_nir_scan_driver_consts() 863 MAX2(const_state->num_driver_params, IR3_DP_VTXCNT_MAX + 1); in ir3_setup_const_state() 898 constoff = MAX2(constoff, 1); in ir3_setup_const_state()
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/third_party/libdrm/radeon/ |
D | radeon_surface.c | 51 #define MAX2(A, B) ((A) > (B) ? (A) : (B)) macro 161 val = MAX2(1, size >> level); in mip_minify() 275 surf->bo_alignment = MAX2(256, surf_man->hw_info.group_bytes); in r6_surface_init_linear() 280 xalign = MAX2(1, surf_man->hw_info.group_bytes / surf->bpe); in r6_surface_init_linear() 284 xalign = MAX2((surf->bpe == 1) ? 64 : 32, xalign); in r6_surface_init_linear() 309 surf->bo_alignment = MAX2(256, surf_man->hw_info.group_bytes); in r6_surface_init_linear_aligned() 311 xalign = MAX2(64, surf_man->hw_info.group_bytes / surf->bpe); in r6_surface_init_linear_aligned() 338 xalign = MAX2(tilew, xalign); in r6_surface_init_1d() 342 xalign = MAX2((surf->bpe == 1) ? 64 : 32, xalign); in r6_surface_init_1d() 345 surf->bo_alignment = MAX2(256, surf_man->hw_info.group_bytes); in r6_surface_init_1d() [all …]
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/third_party/mesa3d/src/mesa/swrast/ |
D | s_blend.c | 375 rgba[i][RCOMP] = MAX2( rgba[i][RCOMP], dest[i][RCOMP] ); in blend_max() 376 rgba[i][GCOMP] = MAX2( rgba[i][GCOMP], dest[i][GCOMP] ); in blend_max() 377 rgba[i][BCOMP] = MAX2( rgba[i][BCOMP], dest[i][BCOMP] ); in blend_max() 378 rgba[i][ACOMP] = MAX2( rgba[i][ACOMP], dest[i][ACOMP] ); in blend_max() 387 rgba[i][RCOMP] = MAX2( rgba[i][RCOMP], dest[i][RCOMP] ); in blend_max() 388 rgba[i][GCOMP] = MAX2( rgba[i][GCOMP], dest[i][GCOMP] ); in blend_max() 389 rgba[i][BCOMP] = MAX2( rgba[i][BCOMP], dest[i][BCOMP] ); in blend_max() 390 rgba[i][ACOMP] = MAX2( rgba[i][ACOMP], dest[i][ACOMP] ); in blend_max() 400 rgba[i][RCOMP] = MAX2( rgba[i][RCOMP], dest[i][RCOMP] ); in blend_max() 401 rgba[i][GCOMP] = MAX2( rgba[i][GCOMP], dest[i][GCOMP] ); in blend_max() [all …]
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/third_party/mesa3d/src/asahi/lib/ |
D | pool.c | 84 alignment = MAX2(alignment, 4096); in agx_pool_alloc_aligned() 94 ALIGN_POT(MAX2(POOL_SLAB_SIZE, sz), 4096)); in agx_pool_alloc_aligned() 117 alignment = MAX2(alignment, 4096); in agx_pool_upload_aligned()
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/third_party/mesa3d/src/mesa/main/ |
D | program_resource.c | 144 *params = MAX2(*params, len + 1); in _mesa_GetProgramInterfaceiv() 155 *params = MAX2(*params, block->NumUniforms); in _mesa_GetProgramInterfaceiv() 177 *params = MAX2(*params, block_params); in _mesa_GetProgramInterfaceiv() 187 *params = MAX2(*params, buffer->NumUniforms); in _mesa_GetProgramInterfaceiv() 197 *params = MAX2(*params, buffer->NumVaryings); in _mesa_GetProgramInterfaceiv() 221 *params = MAX2(*params, uni->num_compatible_subroutines); in _mesa_GetProgramInterfaceiv()
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/third_party/mesa3d/src/gallium/frontends/nine/ |
D | volumetexture9.c | 88 info->last_level = util_logbase2(MAX2(MAX2(Width, Height), Depth)); in NineVolumeTexture9_ctor() 235 This->dirty_box.x = MAX2(This->dirty_box.x, 0); in NineVolumeTexture9_AddDirtyBox() 236 This->dirty_box.y = MAX2(This->dirty_box.y, 0); in NineVolumeTexture9_AddDirtyBox() 237 This->dirty_box.z = MAX2(This->dirty_box.z, 0); in NineVolumeTexture9_AddDirtyBox()
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/third_party/mesa3d/src/panfrost/lib/ |
D | pan_shader.c | 109 comps[loc] = MAX2(comps[loc], chan); in collect_varyings() 150 *varying_count = MAX2(*varying_count, loc + sz); in collect_varyings() 215 info->attribute_count = MAX2(info->attribute_count, PAN_VERTEX_ID + 1); in GENX() 220 info->attribute_count = MAX2(info->attribute_count, PAN_INSTANCE_ID + 1); in GENX() 299 info->ubo_count = MAX2(s->info.num_ubos + 1, inputs->sysval_ubo + 1); in GENX()
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