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Searched refs:MCID (Results 1 – 25 of 75) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MC/
DMCInstrDesc.h134 namespace MCID {
257 bool isPreISelOpcode() const { return Flags & (1ULL << MCID::PreISelOpcode); } in isPreISelOpcode()
263 bool isVariadic() const { return Flags & (1ULL << MCID::Variadic); } in isVariadic()
267 bool hasOptionalDef() const { return Flags & (1ULL << MCID::HasOptionalDef); } in hasOptionalDef()
271 bool isPseudo() const { return Flags & (1ULL << MCID::Pseudo); } in isPseudo()
274 bool isReturn() const { return Flags & (1ULL << MCID::Return); } in isReturn()
277 bool isAdd() const { return Flags & (1ULL << MCID::Add); } in isAdd()
280 bool isTrap() const { return Flags & (1ULL << MCID::Trap); } in isTrap()
283 bool isMoveReg() const { return Flags & (1ULL << MCID::MoveReg); } in isMoveReg()
286 bool isCall() const { return Flags & (1ULL << MCID::Call); } in isCall()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenInstrInfo.inc5846 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
5847 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
5848 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
5849 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5850 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5851 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5852 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
5853 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
5854 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
5855 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/Mips/
DMipsGenInstrInfo.inc4861 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
4862 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
4863 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
4864 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4865 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4866 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4867 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
4868 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
4869 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
4870 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/PowerPC/
DPPCGenInstrInfo.inc2984 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
2985 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
2986 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
2987 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2988 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2989 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2990 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
2991 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
2992 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
2993 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenInstrInfo.inc17700 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
17701 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
17702 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
17703 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17704 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17705 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17706 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
17707 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
17708 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
17709 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/
DPPCHazardRecognizers.cpp29 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isLoadAfterStore() local
30 if (!MCID) in isLoadAfterStore()
33 if (!MCID->mayLoad()) in isLoadAfterStore()
55 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in isBCTRAfterSet() local
56 if (!MCID) in isBCTRAfterSet()
59 if (!MCID->isBranch()) in isBCTRAfterSet()
85 bool PPCDispatchGroupSBHazardRecognizer::mustComeFirst(const MCInstrDesc *MCID, in mustComeFirst() argument
90 unsigned IIC = MCID->getSchedClass(); in mustComeFirst()
123 if (NSlots == 1 && PPC::getNonRecordFormOpcode(MCID->getOpcode()) != -1) in mustComeFirst()
147 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in ShouldPreferAnother() local
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/AArch64/
DAArch64GenInstrInfo.inc6899 …{ 0, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, OperandI…
6900 …{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
6901 …{ 2, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<M…
6902 …{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6903 …{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6904 …{ 5, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6905 …{ 6, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable), 0x0ULL, nullptr, nullptr, Ope…
6906 …{ 7, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr,…
6907 …{ 8, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, /…
6908 …{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, /…
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DMachineInstrBuilder.h317 const MCInstrDesc &MCID) { in BuildMI() argument
318 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)); in BuildMI()
324 const MCInstrDesc &MCID, Register DestReg) { in BuildMI() argument
325 return MachineInstrBuilder(MF, MF.CreateMachineInstr(MCID, DL)) in BuildMI()
334 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
337 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
350 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
353 MachineInstr *MI = MF.CreateMachineInstr(MCID, DL); in BuildMI()
359 const DebugLoc &DL, const MCInstrDesc &MCID, in BuildMI() argument
364 return BuildMI(BB, MachineBasicBlock::instr_iterator(I), DL, MCID, DestReg); in BuildMI()
[all …]
DMachineInstr.h112 const MCInstrDesc *MCID; // Instruction descriptor.
423 const MCInstrDesc &getDesc() const { return *MCID; }
426 unsigned getOpcode() const { return MCID->Opcode; }
442 return getNumExplicitDefs() + MCID->getNumImplicitDefs();
649 return hasProperty(MCID::PreISelOpcode, Type);
657 return hasProperty(MCID::Variadic, Type);
663 return hasProperty(MCID::HasOptionalDef, Type);
669 return hasProperty(MCID::Pseudo, Type);
673 return hasProperty(MCID::Return, Type);
679 return hasProperty(MCID::EHScopeReturn, Type);
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/MCA/
DCodeEmitter.cpp19 CodeEmitter::getOrCreateEncodingInfo(unsigned MCID) { in getOrCreateEncodingInfo() argument
20 EncodingInfo &EI = Encodings[MCID]; in getOrCreateEncodingInfo()
25 const MCInst &Inst = Sequence[MCID]; in getOrCreateEncodingInfo()
26 MCInst Relaxed(Sequence[MCID]); in getOrCreateEncodingInfo()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DScoreboardHazardRecognizer.cpp122 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in getHazardType() local
123 if (!MCID) { in getHazardType()
127 unsigned idx = MCID->getSchedClass(); in getHazardType()
177 const MCInstrDesc *MCID = DAG->getInstrDesc(SU); in EmitInstruction() local
178 assert(MCID && "The scheduler must filter non-machineinstrs"); in EmitInstruction()
179 if (DAG->TII->isZeroCost(MCID->Opcode)) in EmitInstruction()
186 unsigned idx = MCID->getSchedClass(); in EmitInstruction()
DMachineInstr.cpp103 if (MCID->ImplicitDefs) in addImplicitDefUseOperands()
104 for (const MCPhysReg *ImpDefs = MCID->getImplicitDefs(); *ImpDefs; in addImplicitDefUseOperands()
107 if (MCID->ImplicitUses) in addImplicitDefUseOperands()
108 for (const MCPhysReg *ImpUses = MCID->getImplicitUses(); *ImpUses; in addImplicitDefUseOperands()
118 : MCID(&tid), debugLoc(std::move(dl)) { in MachineInstr()
122 if (unsigned NumOps = MCID->getNumOperands() + in MachineInstr()
123 MCID->getNumImplicitDefs() + MCID->getNumImplicitUses()) { in MachineInstr()
135 : MCID(&MI.getDesc()), Info(MI.Info), debugLoc(MI.getDebugLoc()) { in MachineInstr()
200 assert(MCID && "Cannot add operands before providing an instr descriptor"); in addOperand()
233 assert((isImpReg || Op.isRegMask() || MCID->isVariadic() || in addOperand()
[all …]
DMachineVerifier.cpp920 const MCInstrDesc &MCID = MI->getDesc(); in verifyPreISelGenericInstruction() local
925 for (unsigned I = 0, E = std::min(MCID.getNumOperands(), NumOps); in verifyPreISelGenericInstruction()
927 if (!MCID.OpInfo[I].isGenericType()) in verifyPreISelGenericInstruction()
931 size_t TypeIdx = MCID.OpInfo[I].getGenericTypeIndex(); in verifyPreISelGenericInstruction()
964 if (MI->getNumOperands() < MCID.getNumOperands()) in verifyPreISelGenericInstruction()
975 if (MI->getNumOperands() < MCID.getNumOperands()) in verifyPreISelGenericInstruction()
1129 assert(MCID.getNumOperands() == 2 && "Expected 2 operands G_*{EXT,TRUNC}"); in verifyPreISelGenericInstruction()
1467 const MCInstrDesc &MCID = MI->getDesc(); in visitMachineInstrBefore() local
1468 if (MI->getNumOperands() < MCID.getNumOperands()) { in visitMachineInstrBefore()
1470 errs() << MCID.getNumOperands() << " operands expected, but " in visitMachineInstrBefore()
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/NVPTX/
DNVPTXReplaceImageHandles.cpp81 const MCInstrDesc &MCID = MI.getDesc(); in processInstr() local
83 if (MCID.TSFlags & NVPTXII::IsTexFlag) { in processInstr()
89 if (!(MCID.TSFlags & NVPTXII::IsTexModeUnifiedFlag)) { in processInstr()
95 } else if (MCID.TSFlags & NVPTXII::IsSuldMask) { in processInstr()
97 1 << (((MCID.TSFlags & NVPTXII::IsSuldMask) >> NVPTXII::IsSuldShift) - 1); in processInstr()
105 } else if (MCID.TSFlags & NVPTXII::IsSustFlag) { in processInstr()
112 } else if (MCID.TSFlags & NVPTXII::IsSurfTexQueryFlag) { in processInstr()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Utils/
DValueMapper.cpp86 unsigned MCID : 29; member
159 unsigned MCID);
163 unsigned MCID);
165 unsigned MCID);
166 void scheduleRemapFunction(Function &F, unsigned MCID);
817 CurrentMCID = E.MCID; in flush()
996 unsigned MCID) { in scheduleMapGlobalInitializer() argument
998 assert(MCID < MCs.size() && "Invalid mapping context"); in scheduleMapGlobalInitializer()
1002 WE.MCID = MCID; in scheduleMapGlobalInitializer()
1012 unsigned MCID) { in scheduleMapAppendingVariable() argument
[all …]
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumb2SizeReduction.cpp254 static bool HasImplicitCPSRDef(const MCInstrDesc &MCID) { in HasImplicitCPSRDef() argument
255 for (const MCPhysReg *Regs = MCID.getImplicitDefs(); *Regs; ++Regs) in HasImplicitCPSRDef()
645 const MCInstrDesc &MCID = MI->getDesc(); in ReduceSpecial() local
646 if (MCID.hasOptionalDef() && in ReduceSpecial()
647 MI->getOperand(MCID.getNumOperands()-1).getReg() == ARM::CPSR) in ReduceSpecial()
805 const MCInstrDesc &MCID = MI->getDesc(); in ReduceTo2Addr() local
806 if (MCID.hasOptionalDef()) { in ReduceTo2Addr()
807 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr()
829 unsigned NumOps = MCID.getNumOperands(); in ReduceTo2Addr()
831 if (i < NumOps && MCID.OpInfo[i].isOptionalDef()) in ReduceTo2Addr()
[all …]
DARMHazardRecognizer.cpp21 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
22 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
25 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard()
42 const MCInstrDesc &MCID = MI->getDesc(); in getHazardType() local
43 if (LastMI && (MCID.TSFlags & ARMII::DomainMask) != ARMII::DomainGeneral) { in getHazardType()
DMLxExpansionPass.cpp184 const MCInstrDesc &MCID = MI->getDesc(); in hasRAWHazard() local
185 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in hasRAWHazard()
188 unsigned Opcode = MCID.getOpcode(); in hasRAWHazard()
339 const MCInstrDesc &MCID = MI->getDesc(); in ExpandFPMLxInstructions() local
346 unsigned Domain = MCID.TSFlags & ARMII::DomainMask; in ExpandFPMLxInstructions()
356 if (!TII->isFpMLxInstruction(MCID.getOpcode(), in ExpandFPMLxInstructions()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/
DSystemZInstrBuilder.h30 const MCInstrDesc &MCID = MI->getDesc(); in addFrameReference() local
32 if (MCID.mayLoad()) in addFrameReference()
34 if (MCID.mayStore()) in addFrameReference()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/include/llvm/MCA/
DCodeEmitter.h55 EncodingInfo getOrCreateEncodingInfo(unsigned MCID);
63 StringRef getEncoding(unsigned MCID) { in getEncoding() argument
64 EncodingInfo EI = getOrCreateEncodingInfo(MCID); in getEncoding()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DScheduleDAGFast.cpp254 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in CopyAndMoveSuccessors() local
255 for (unsigned i = 0; i != MCID.getNumOperands(); ++i) { in CopyAndMoveSuccessors()
256 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in CopyAndMoveSuccessors()
261 if (MCID.isCommutable()) in CopyAndMoveSuccessors()
432 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in getPhysicalRegisterVT() local
433 assert(MCID.ImplicitDefs && "Physical reg def must be in implicit def list!"); in getPhysicalRegisterVT()
434 NumRes = MCID.getNumDefs(); in getPhysicalRegisterVT()
435 for (const MCPhysReg *ImpDef = MCID.getImplicitDefs(); *ImpDef; ++ImpDef) { in getPhysicalRegisterVT()
511 const MCInstrDesc &MCID = TII->get(Node->getMachineOpcode()); in DelayForLiveRegsBottomUp() local
512 if (!MCID.ImplicitDefs) in DelayForLiveRegsBottomUp()
[all …]
DScheduleDAGSDNodes.cpp212 const MCInstrDesc &MCID = TII->get(N->getMachineOpcode()); in ClusterNeighboringLoads() local
213 for (unsigned I = 0; I != MCID.getNumOperands(); ++I) { in ClusterNeighboringLoads()
214 if (MCID.getOperandConstraint(I, MCOI::TIED_TO) != -1) in ClusterNeighboringLoads()
315 const MCInstrDesc &MCID = TII->get(Opc); in ClusterNodes() local
316 if (MCID.mayLoad()) in ClusterNodes()
449 const MCInstrDesc &MCID = TII->get(Opc); in AddSchedEdges() local
450 for (unsigned i = 0; i != MCID.getNumOperands(); ++i) { in AddSchedEdges()
451 if (MCID.getOperandConstraint(i, MCOI::TIED_TO) != -1) { in AddSchedEdges()
456 if (MCID.isCommutable()) in AddSchedEdges()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/
DHexagonMCChecker.cpp87 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MCI); in init() local
92 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i) in init()
95 for (unsigned i = 0; i < MCID.getNumImplicitUses(); ++i) in init()
96 initReg(MCI, MCID.getImplicitUses()[i], PredReg, isTrue); in init()
99 if (const MCPhysReg *ImpDef = MCID.getImplicitDefs()) in init()
103 if (Hexagon::R31 != R && MCID.isCall()) in init()
128 for (unsigned i = 0; i < MCID.getNumDefs(); ++i) { in init()
182 for (unsigned i = MCID.getNumDefs(); i < MCID.getNumOperands(); ++i) in init()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64ConditionalCompares.cpp632 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
635 MRI->createVirtualRegister(TII->getRegClass(MCID, 0, TRI, *MF)); in convert()
637 BuildMI(*Head, Head->end(), TermDL, MCID) in convert()
644 TII->getRegClass(MCID, 1, TRI, *MF)); in convert()
689 const MCInstrDesc &MCID = TII->get(Opc); in convert() local
691 TII->getRegClass(MCID, 0, TRI, *MF)); in convert()
694 TII->getRegClass(MCID, 1, TRI, *MF)); in convert()
695 MachineInstrBuilder MIB = BuildMI(*Head, CmpMI, CmpMI->getDebugLoc(), MCID) in convert()
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrBuilder.h202 const MCInstrDesc &MCID = MI->getDesc(); variable
204 if (MCID.mayLoad())
206 if (MCID.mayStore())

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