| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrMVE.td | 1052 : MVE_p<(outs MQPR:$Qd), (ins MQPR:$Qn, MQPR:$Qm), itin, iname, suffix,
1053 "$Qd, $Qn, $Qm", vpred_r, cstr, pattern> {
1054 bits<4> Qd;
1058 let Inst{22} = Qd{3};
1061 let Inst{15-13} = Qd{2-0};
1189 bits<4> Qd;
1192 let Inst{22} = Qd{3};
1193 let Inst{15-13} = Qd{2-0};
1198 def MVE_VBIC : MVE_bit_arith<(outs MQPR:$Qd), (ins MQPR:$Qn, MQPR:$Qm),
1199 "vbic", "", "$Qd, $Qn, $Qm", ""> {
[all …]
|
| D | ARMInstrNEON.td | 6756 def : NEONInstAlias<"vcvt${p}.s32.f32 $Qd, $Qm, #0",
6757 (VCVTf2sq QPR:$Qd, QPR:$Qm, pred:$p)>;
6758 def : NEONInstAlias<"vcvt${p}.u32.f32 $Qd, $Qm, #0",
6759 (VCVTf2uq QPR:$Qd, QPR:$Qm, pred:$p)>;
6760 def : NEONInstAlias<"vcvt${p}.f32.s32 $Qd, $Qm, #0",
6761 (VCVTs2fq QPR:$Qd, QPR:$Qm, pred:$p)>;
6762 def : NEONInstAlias<"vcvt${p}.f32.u32 $Qd, $Qm, #0",
6763 (VCVTu2fq QPR:$Qd, QPR:$Qm, pred:$p)>;
6774 def : NEONInstAlias<"vcvt${p}.s16.f16 $Qd, $Qm, #0",
6775 (VCVTh2sq QPR:$Qd, QPR:$Qm, pred:$p)>;
[all …]
|
| D | ARMInstrFormats.td | 240 // instructions that both read and write their Qd register even when
261 // (which by convention will be called $Qd).
269 let vpred_constraint = ",$Qd = $vp.inactive";
|
| /third_party/skia/third_party/externals/swiftshader/third_party/subzero/src/ |
| D | IceAssemblerARM32.cpp | 1224 const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName); in emitSIMDqqqBase() local
1228 emitSIMDBase(Opcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn), mapQRegToDReg(Qm), in emitSIMDqqqBase()
1245 const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName); in emitSIMDShiftqqc() local
1251 emitSIMDBase(Opcode | (Imm6 << ElmtShift), mapQRegToDReg(Qd), in emitSIMDShiftqqc()
1262 const IValueT Qd = encodeQRegister(OpQd, "Qd", OpcodeName); in emitSIMDCvtqq() local
1265 emitSIMDBase(SIMDOpcode, mapQRegToDReg(Qd), mapQRegToDReg(Qn), in emitSIMDCvtqq()
2982 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vld1qr); in vld1qr() local
2983 const IValueT Dd = mapQRegToDReg(Qd); in vld1qr()
3012 const IValueT Qd = encodeQRegister(OpQd, "Qd", Vld1qr); in vld1() local
3013 const IValueT Dd = mapQRegToDReg(Qd); in vld1()
[all …]
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenGlobalISel.inc | 2679 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
3300 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
3497 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
4101 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
4308 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
4377 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
4593 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
4659 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
4704 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
5490 GIR_Copy, /*NewInsnID*/0, /*OldInsnID*/0, /*OpIdx*/0, // Qd
[all …]
|
| D | ARMGenMCCodeEmitter.inc | 4550 // op: Qd
4562 // op: Qd
4578 // op: Qd
4595 // op: Qd
4652 // op: Qd
4686 // op: Qd
4704 // op: Qd
4723 // op: Qd
4742 // op: Qd
4761 // op: Qd
[all …]
|
| D | ARMGenAsmWriter.inc | 12396 // (MVE_VORR MQPR:$Qd, MQPR:$Qm, MQPR:$Qm, vpred_r:$vp) - 155
|
| /third_party/curl/docs/ |
| D | PARALLEL-TRANSFERS.md | 35 DL% UL% Dled Uled Xfers Live Qd Total Current Left Speed
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonPseudo.td | 446 def PS_vloadrq_ai: Pseudo<(outs HvxQR:$Qd),
464 def PS_qtrue: InstHexagon<(outs HvxQR:$Qd), (ins), "", [], "",
466 def PS_qfalse: InstHexagon<(outs HvxQR:$Qd), (ins), "", [], "",
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/Disassembler/ |
| D | ARMDisassembler.cpp | 3511 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) | in DecodeMVEModImmInstruction() local
3523 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEModImmInstruction()
3539 unsigned Qd = fieldFromInstruction(Insn, 13, 3); in DecodeMVEVADCInstruction() local
3540 Qd |= fieldFromInstruction(Insn, 22, 1) << 3; in DecodeMVEVADCInstruction()
3541 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVADCInstruction()
3555 Inst.addOperand(MCOperand::createImm(Qd)); in DecodeMVEVADCInstruction()
6344 unsigned Qd = fieldFromInstruction(Val, 13, 3); in DecodeMVE_MEM_pre() local
6350 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVE_MEM_pre()
6424 unsigned Qd = ((fieldFromInstruction(Insn, 22, 1) << 3) | in DecodeMVEVMOVQtoDReg() local
6432 if (!Check(S, DecodeMQPRRegisterClass(Inst, Qd, Address, Decoder))) in DecodeMVEVMOVQtoDReg()
[all …]
|
| /third_party/boost/libs/wave/test/testwave/testfiles/ |
| D | t_5_035.hpp | 688 #define Qd macro
|
| /third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/AsmParser/ |
| D | ARMAsmParser.cpp | 7557 const unsigned Qd = MRI->getEncodingValue(Inst.getOperand(QdIdx).getReg()); in validateInstruction() local
7560 if (Qd == Qm) { in validateInstruction()
|
| /third_party/skia/third_party/externals/libjpeg-turbo/testimages/ |
| D | testorig.ppm | 4 …BF�@C�BK�KT�N[�JZ�F\�F_�A_�Ba�Ei�Jp�Nw�Oz�Nx�Lv�Q{�R{�Ov�Ot�Vy�]{�So�D^�Tl�Qd�dt��������`d�MM�jgΏ�…
|
| /third_party/flutter/skia/third_party/externals/libjpeg-turbo/testimages/ |
| D | testorig.ppm | 4 …BF�@C�BK�KT�N[�JZ�F\�F_�A_�Ba�Ei�Jp�Nw�Oz�Nx�Lv�Q{�R{�Ov�Ot�Vy�]{�So�D^�Tl�Qd�dt��������`d�MM�jgΏ�…
|
| /third_party/libjpeg-turbo/testimages/ |
| D | testorig.ppm | 4 …BF�@C�BK�KT�N[�JZ�F\�F_�A_�Ba�Ei�Jp�Nw�Oz�Nx�Lv�Q{�R{�Ov�Ot�Vy�]{�So�D^�Tl�Qd�dt��������`d�MM�jgΏ�…
|
| /third_party/skia/experimental/wasm-skp-debugger/debugger/ |
| D | anim.mskp | 1745 …�O��=N���������;:���������:������-�����/�������@�&Qd��-�H���������&…
7617 …�O��=N���������;:���������:������-�����/�������@�&Qd��-�H���������&…
11803 …�����s�[EBfm��<����AO5��<�S�MS�&�1#1��x����H�Fb�֙����䨩�aφ��y^lnl�"�}Qd�3�� �� �����xZ�b�…
12878 …�!?;s�7�̉8 ����/�> J",�����|lϱm %Ľ�m�ğ���j]�UU�@��ysi� �����p�X��Qd���+����K�q��, ���…
13002 …�ʛ�[��|����>��{��W_]�B��T��m[n>����x���]�u]��{ｈtM\�?��ݿ���?����Ó��w2��Qd�^�!��)�v�07V9�~���;…
13997 …��M�г�� �IDAT�Z�5��B""� � 9��=�C|��p�����{��跇���ʓ�xe-�C�@��@bW_"1��Qd�AR ���>���{��c @U/�…
15179 ��CCC��oW���i˴�^N�E�3��(j�iYU�Z�Qd�
17084 …�O��=N���������;:���������:������-�����/�������@�&Qd��-�H���������&…
22973 …�O��=N���������;:���������:������-�����/�������@�&Qd��-�H���������&…
28862 …�O��=N���������;:���������:������-�����/�������@�&Qd��-�H���������&…
[all …]
|
| /third_party/mesa3d/src/freedreno/.gitlab-ci/reference/ |
| D | crash.log | 3115 0001c0: 18ce18e8 07d52b7f 64518060 394617df |.....+..`.Qd..F9|
|
| /third_party/chromium/patch/ |
| D | 0001-cve.patch | 46831 z6S-TL?J%nLNL9f%<5-gT!Qd}`Q#Br&SFvMWg7<Ctdd@+0+kRC%-9TA7qx7p-O3_W)
47841 zM<ADFege*E$Rv_kAMHGiTpb^z<qfqSYN?5#*4ZqJCKDYyl9%{Qd^F2ik9)JM(*|lU
48483 zk&`;3Qd#sTiKQ@MhuJLgR_u<sLquOQyom*l$XrLqkQkllj91cq4(^D+xNNqB%hTTx
48743 z@H6qV@U!uA@N@C=@bmE>;}_r;;s@}H@Qd+F@PqiJ_+|Lz_!an-_#yl-eieQ-ehq#t
49237 z^#6Qd-@S&|!~+jJGFtR!Sj%uE!|@EK4tr?S{bCNo`45eHs7@>n;A4-D6w4T{eB{BQ
49987 z>Qd=-h7>T(%rSG#JhMQ`GQ%2YZ6X%fR9?o~T3*K5R$j)MV(ln#XL%Vpa<7;81}TS;
51472 z18J-+Yr1WIaS3`f9J3)bfY88Fbg5dcMnPJ-Qd!Z-!lF)Q5jg?v=&as~Q0wgSi*B-l
52305 z#*AkeGtExzys})~*>NLd@t-iJ{@wPSJ$)a4^5E|Qd>-KE_Z?k0Za8lXGRA)Z?eTr5
53793 zxnyN^Rom^VQky2*>nl=PmRQD+q4Yf&<*i^`=ljuZ#6{i`R~_mQ$9z1Zd^Qd~5#2bn
54498 z?YnpLv}3Mv<y2w+Qd=~t{mJUHZa$TojFjZ>P&b0kGYLEIfX>+>na^TqRH!hy2OFen
[all …]
|
| D | 0003-3.2-Beta3-1115.patch | 190483 zJ&Qd>O8=n}Od|4}{$my414jvO3Gu$(q$U92NOlyu?J!6*cUMEctHA(=rW4zr=&vh3
190674 zeL4!=Rj28Ey!Lb#bZbs~p}X=louF2?RiazfM(5y_ZFF9`qK(c=m$ywucUc>qo>#Qd
191093 zN~yZ=Aj+7&Qd+^qKG7K6v<fj2>BcsIF2cuar5eawD=p=^JYK3lWN$*aYR{G)lAg3O
191302 z^Xge&hedtE-T5D3)&Y!<2(><Dbj8x@_-ANMtra>R-^AL2(I;!FN;k#Qd|p%QBOOe5
191759 zIvYXcV>TRI?Hn5kY9F-`P=41&K>7dB2qS#!-0rD%>J@5mn{Qd-un^&xKkWJ0;stx=
193558 zix__Wl{rjc&p}~Qd~+COmZKlB^M`({rCO}#fy(CbMLH)*A{4~R=88HqRkqK=zJnpX
193657 z4d0^Ki05uPl8K8i;c5+O!10P>Ic}+Qd~cGpncT4bLC>4X)Mh}bzz=|_*K|g{sQAMX
|
| /third_party/libpsl/fuzz/libpsl_idn_load_fuzzer.in/ |
| D | aad02c8751dbbae84b491af9b5ec0900e4ab6e72 | 9630 �NL���؏�S���E��Z�Ln�Ö`���=l �va�;(�>̽��p� ʠ������~��[����@��Qd��F!��7��H��$�������� ���…
|
| /third_party/openssl/test/recipes/30-test_evp_data/ |
| D | evppkey.txt | 9707 Qd+UCNkfDgId+PBSa4BjAxSV
|
| /third_party/openh264/res/ |
| D | Cisco_Absolute_Power_1280x720_30fps.yuv | 2311 …" *FRRYYWVRTTYehkttoi]URQeikkkmnlmst{{~���������������������sgr�����‹fNMMF?Qd����������������ij�uP<…
|