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Searched refs:RAX (Results 1 – 25 of 52) sorted by relevance

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/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrSVM.td35 let Uses = [RAX] in
43 let Uses = [RAX] in
51 let Uses = [RAX] in
59 let Uses = [RAX, ECX] in
DX86InstrArithmetic.td77 // RAX,RDX = RAX*GR64
78 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX], hasSideEffects = 0 in
81 [/*(set RAX, RDX, EFLAGS, (X86umul_flag RAX, GR64:$src))*/]>,
101 // RAX,RDX = RAX*[mem64]
102 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
121 // RAX,RDX = RAX*GR64
122 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
139 // RAX,RDX = RAX*[mem64]
140 let Defs = [RAX,RDX,EFLAGS], Uses = [RAX] in
292 // RDX:RAX/r64 = RAX,RDX
[all …]
DX86CallingConv.td44 let GPR_64 = [RAX]; ///< Not actually used, but AssignToReg can't handle []
64 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R10, R11, R12, R14, R15];
71 let GPR_64 = [RAX, RCX, RDX, RDI, RSI, R8, R9, R12, R13, R14, R15];
221 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>,
346 // The X86-Win64 calling convention always returns __m64 values in RAX.
349 // GCC returns FP values in RAX on Win64.
373 CCIfType<[i64], CCAssignToReg<[R15, RBP, RAX, RDX]>>
381 // Return: RAX
382 CCIfType<[i64], CCAssignToReg<[RAX]>>
395 CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R8]>>,
[all …]
DX86WinAllocaExpander.cpp219 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower()
233 unsigned RegA = Is64Bit ? X86::RAX : X86::EAX; in lower()
247 unsigned RegA = Is64BitAlloca ? X86::RAX : X86::EAX; in lower()
DX86InstrExtension.td20 let Defs = [RAX], Uses = [EAX] in // RAX = signext(EAX)
32 let Defs = [RAX,RDX], Uses = [RAX] in // RDX:RAX = signext(RAX)
DX86InstrSystem.td16 let Defs = [RAX, RDX] in
19 let Defs = [RAX, RCX, RDX] in
412 let Defs = [RAX, RDX], Uses = [ECX] in
566 let Defs = [RAX, RDI], Uses = [RDX, RDI], SchedRW = [WriteSystem] in
580 let Defs = [RAX, RSI, RDI], Uses = [RAX, RSI, RDI] in {
584 let Defs = [RAX, RDX, RSI], Uses = [RAX, RSI] in
663 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX] in {
725 // "Successful execution of the leaf clears RAX (set to zero) and ZF, CF, PF,
727 // indicated in RAX with ZF set to 1 and CF, PF, AF, OF, and SF are cleared."
731 let Uses = [RAX, RBX, RCX, RDX], Defs = [RAX, RBX, RCX, RDX, EFLAGS] in
DX86RegisterBanks.td12 /// General Purpose Registers: RAX, RCX,...
DX86RegisterInfo.td169 def RAX : X86Reg<"rax", 0, [EAX]>, DwarfRegNum<[0, -2, -2]>;
423 (add RAX, RCX, RDX, RSI, RDI, R8, R9, R10, R11,
447 def GR64_ABCD : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RBX)>;
449 def GR64_TC : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX, RSI, RDI,
451 def GR64_TCW64 : RegisterClass<"X86", [i64], 64, (add RAX, RCX, RDX,
471 (add RAX, RCX, RDX, RSI, RDI, RBX, RBP, RSP, RIP)>;
510 def GR64_AD : RegisterClass<"X86", [i64], 64, (add RAX, RDX)>;
DX86SelectionDAGInfo.cpp56 const MCPhysReg ClobberSet[] = {X86::RCX, X86::RAX, X86::RDI, in EmitTargetCodeForMemset()
127 ValReg = X86::RAX; in EmitTargetCodeForMemset()
DX86MCInstLower.cpp303 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortImmForm()
330 if (Op0 == X86::RAX && Op1 == X86::EAX) in SimplifyMOVSX()
364 if (Reg != X86::AL && Reg != X86::AX && Reg != X86::EAX && Reg != X86::RAX) in SimplifyShortMoveForm()
741 unsigned ReturnReg = Subtarget.is64Bit() ? X86::RAX : X86::EAX; in Lower()
1064 BaseReg = X86::RAX; in EmitNop()
1091 IndexReg = X86::RAX; in EmitNop()
1097 IndexReg = X86::RAX; in EmitNop()
1108 IndexReg = X86::RAX; in EmitNop()
1114 IndexReg = X86::RAX; in EmitNop()
1120 IndexReg = X86::RAX; in EmitNop()
[all …]
DX86FrameLowering.cpp200 if (Reg == X86::RAX || Reg == X86::EAX || Reg == X86::AX || in isEAXLiveIn()
264 unsigned Rax = (unsigned)(Is64Bit ? X86::RAX : X86::EAX); in emitSPUpdate()
325 ? (unsigned)(Is64Bit ? X86::RAX : X86::EAX) in emitSPUpdate()
587 const Register SizeReg = InProlog ? X86::RAX in emitStackProbeInline()
644 BuildMI(&MBB, DL, TII.get(X86::MOV64rr), SizeReg).addReg(X86::RAX); in emitStackProbeInline()
797 unsigned AX = Uses64BitFramePtr ? X86::RAX : X86::EAX; in emitStackProbeCall()
1251 .addReg(X86::RAX, RegState::Kill) in emitPrologue()
1270 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri32), X86::RAX) in emitPrologue()
1274 BuildMI(MBB, MBBI, DL, TII.get(X86::MOV64ri), X86::RAX) in emitPrologue()
1293 MI = addRegOffset(BuildMI(MF, DL, TII.get(X86::MOV64rm), X86::RAX), in emitPrologue()
[all …]
DX86InstrInfo.td1497 let Defs = [RDI], Uses = [RAX,RDI,DF] in
1511 let Defs = [EDI,EFLAGS], Uses = [RAX,EDI,DF] in
1612 let Defs = [RAX] in
1641 let Uses = [RAX] in
1674 let Defs = [RAX] in
1693 let Uses = [RAX] in
2073 let Uses = [RAX], Defs = [RAX] in
2127 let Defs = [RAX, EFLAGS], Uses = [RAX] in
2147 let Defs = [RAX, EFLAGS], Uses = [RAX] in
2156 let Defs = [RAX, RDX, EFLAGS], Uses = [RAX, RBX, RCX, RDX] in
[all …]
/third_party/libunwind/src/x86_64/
Dinit.h49 c->dwarf.loc[RAX] = REG_INIT_LOC(c, rax, RAX); in common_init()
Dunwind_i.h39 #define RAX 0 macro
DGregs.c104 loc = c->dwarf.loc[(reg == UNW_X86_64_RAX) ? RAX : RDX]; in tdep_access_reg()
DGos-solaris.c76 c->dwarf.loc[RAX] = DWARF_LOC (ucontext + UC_MCONTEXT_GREGS_RAX, 0); in x86_64_handle_signal_frame()
/third_party/musl/arch/x86_64/bits/
Dreg.h13 #define RAX 10 macro
/third_party/musl/arch/x32/bits/
Dreg.h13 #define RAX 10 macro
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/MCTargetDesc/
DX86MCTargetDesc.cpp156 {codeview::RegisterId::RAX, X86::RAX}, in initLLVMToSEHAndCVRegMapping()
615 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
627 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
664 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
700 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
736 case X86::AH: case X86::AL: case X86::AX: case X86::EAX: case X86::RAX: in getX86SubSuperRegisterOrZero()
737 return X86::RAX; in getX86SubSuperRegisterOrZero()
/third_party/libffi/src/x86/
Dwin64_intel.S52 mov RAX, [RSP] ; movq (%rsp), %rax
54 mov [arg1 + 8], RAX; movq %rax, 8(arg1)
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/
DX86DisassemblerDecoder.h173 ENTRY(RAX) \
191 ENTRY(RAX) \
/third_party/skia/third_party/externals/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/X86/
DX86GenRegisterInfo.inc69 RAX = 49,
1966 …X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, …
1996 …X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, …
2006 …X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::RBX, …
2016 … X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11, X86::RIP, X86::RSP,
2026 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::RBX, X86::RBP, X86::RSP, X86::RIP,
2036 X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R10, X86::R11, X86::RIP, X86::RSP,
2046 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11, X86::RSP,
2056 X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R11,
2066 X86::RAX, X86::RCX, X86::RDX, X86::R8, X86::R9, X86::R10, X86::R11, X86::RSP,
[all …]
DX86GenCallingConv.inc843 if (unsigned Reg = State.AllocateReg(X86::RAX)) {
861 if (unsigned Reg = State.AllocateReg(X86::RAX)) {
1437 if (unsigned Reg = State.AllocateReg(X86::RAX)) {
1741 …, X86::R15, X86::RDI, X86::RSI, X86::RDX, X86::RCX, X86::R8, X86::R9, X86::RAX, X86::R10, X86::R11…
1833 if (unsigned Reg = State.AllocateReg(X86::RAX)) {
1910 …X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, …
1931 …X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R12, X86::R13, X86::R14, …
2170 if (unsigned Reg = State.AllocateReg(X86::RAX)) {
2381 …X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, …
2402 …X86::RAX, X86::RCX, X86::RDX, X86::RDI, X86::RSI, X86::R8, X86::R9, X86::R10, X86::R11, X86::R12, …
[all …]
/third_party/libunwind/tests/
Dx64-test-dwarf-expressions.S32 # RAX flows back unchanged. Adding any function calls to the below may clobber
/third_party/boost/libs/context/src/asm/
Dontop_x86_64_ms_pe_masm.asm192 ; transport_t returned in RAX

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