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Searched refs:R_0282D0_PA_SC_VPORT_ZMIN_0 (Results 1 – 6 of 6) sorted by relevance

/third_party/mesa3d/src/gallium/drivers/r600/
Dr600_viewport.c48 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
363 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in r600_emit_depth_ranges()
375 radeon_set_context_reg_seq(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + in r600_emit_depth_ranges()
Devergreend.h2024 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
Dr600d.h2907 #define R_0282D0_PA_SC_VPORT_ZMIN_0 0x0282D0 macro
/third_party/mesa3d/src/gallium/drivers/radeonsi/
Dsi_state_viewport.c534 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, 2); in si_emit_depth_ranges()
545 radeon_set_context_reg_seq(R_0282D0_PA_SC_VPORT_ZMIN_0, SI_MAX_VIEWPORTS * 2); in si_emit_depth_ranges()
/third_party/mesa3d/src/amd/vulkan/
Dsi_cmd_buffer.c246 radeon_set_context_reg(cs, R_0282D0_PA_SC_VPORT_ZMIN_0 + i * 8, 0); in si_emit_graphics()
Dradv_cmd_buffer.c1427 radeon_set_context_reg_seq(cmd_buffer->cs, R_0282D0_PA_SC_VPORT_ZMIN_0, count * 2); in radv_emit_viewport()