Home
last modified time | relevance | path

Searched refs:SCB_CCR_IC_Msk (Results 1 – 9 of 9) sorted by relevance

/third_party/cmsis/CMSIS/Core/Include/
Dcachel1_armv7.h60 if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */ in SCB_EnableICache()
67 SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */ in SCB_EnableICache()
83 SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */ in SCB_DisableICache()
Dcore_cm23.h505 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro
Dcore_armv8mbl.h505 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro
Dcore_cm7.h603 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro
Dcore_armv8mml.h657 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro
Dcore_cm35p.h657 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro
Dcore_cm33.h657 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro
Dcore_cm55.h677 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro
Dcore_armv81mml.h677 #define SCB_CCR_IC_Msk (1UL << SCB_CCR_IC_Pos) /*!< SCB … macro